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Company Information:

Company Name:
Belford Research, Inc.
Address:
386 Spanish Wells Road
Hilton Head Island, SC 29926
Phone:
(843) 681-7688
URL:
N/A
EIN:
N/A
DUNS:
N/A
Number of Employees:
5
Woman-Owned?:
Yes
Minority-Owned?:
No
HUBZone-Owned?:
No

Commercialization:

Has been acquired/merged with?:
N/A
Has had Spin-off?:
N/A
Has Had IPO?:
N/A
Year of IPO:
N/A
Has Patents?:
N/A
Number of Patents:
N/A
Total Sales to Date $:
$ 0.00
Total Investment to Date $
$ 0.00
POC Title:
N/A
POC Name:
N/A
POC Phone:
N/A
POC Email:
N/A
Narrative:
N/A

Award Totals:

Program/Phase Award Amount ($) Number of Awards
SBIR Phase I $374,522.00 5
SBIR Phase II $1,294,329.00 2

Award List:

N/A

Award Year / Program / Phase:
2000 / SBIR / Phase I
Award Amount:
$65,000.00
Agency / Branch:
DOD / MDA
Principal Investigator:
Abstract:
N/a

NEXT-AGAIN-GENERATION RADIATION HARD CMOS

Award Year / Program / Phase:
2001 / SBIR / Phase II
Award Amount:
$794,332.00
Agency / Branch:
DOD / MDA
Principal Investigator:
Rona Belford, President
Abstract:
We proposed a simple wafer scale method to leap frog current CMOS technology. The slow-down in CMOS scaling is limited by technology difficulties and by economics. In tooling up for .13-micron technology, the jump from .18-micron is costing $10 billionis equipment alone, plus accompanying expenses… More

Strain-Enhanced Tunnel Diode Technology

Award Year / Program / Phase:
2002 / SBIR / Phase I
Award Amount:
$69,645.00
Agency / Branch:
DOD / MDA
Principal Investigator:
Rona E. Belford, President
Abstract:
"We intend to increase by an order of magnitude, the current density of silicon-based tunnel diodes. This increase directly relates to a corresponding increase in performance (speed). Apart from being the fastest of all microelectronic devices, tunneldiodes (TDs) have negative differential… More

Germanium-Free Strained-SOI Wafers

Award Year / Program / Phase:
2002 / SBIR / Phase I
Award Amount:
$69,999.00
Agency / Branch:
DOD / MDA
Principal Investigator:
Rona E. Belford, President
Abstract:
"We propose to combine the technologies of SOI manufacture with strain-inducing wafer bonding to produce Strained-Si On Insulator (SSOI) wafers. Optimizing this new Strained-Silicon-on-Insulator will increase carrier mobilities by a factor of at least x3,lower the band gap by 20%, and reduce… More

Gallium Nitride (GaN) Device Technology Enhancements Leading to Advanced Transmit/Receive (T/R) Modules for Radar Performance Enhancement

Award Year / Program / Phase:
2003 / SBIR / Phase I
Award Amount:
$69,998.00
Agency / Branch:
DOD / MDA
Principal Investigator:
Rona E. Belford, President
Abstract:
We propose to increase the mobility of both n- and p-type GaN by applying tensile strain and fixing the strain by bonding to an appropriate heat sink material. Straining in other semiconductor materials is now recognized as a viable route to higherperformance. We have demonstrated in these systems… More

SBIR Phase I: Ge-Free Strained Silicon Via dTCE Bonding (Differential Thermal Coefficient of Expansion Bonding)

Award Year / Program / Phase:
2003 / SBIR / Phase I
Award Amount:
$99,880.00
Agency:
NSF
Principal Investigator:
Rona Belford
Abstract:
This Small Business Innovation Research (SBIR) Phase I propose to combine the technologies of silicon-on-insulator (SOI) manufacture with strain-inducing wafer bonding to produce Strained-Si On Insulator (SSOI) wafers. Silicon-based devices with silicon/germanium (Si/Ge) heterostructures have… More

SBIR Phase II: Ge-Free Strained Silicon Via dTCE Bonding (Differential Thermal Coefficient of Expansion Bonding)

Award Year / Program / Phase:
2004 / SBIR / Phase II
Award Amount:
$499,997.00
Agency:
NSF
Principal Investigator:
Abstract:
This Small Business Innovative Research Phase II project will develop a process that integrates wafer bonding technology with a novel straining process to create a new ultra fast silicon substrate: Strained-Silicon-On-Insulator (SSOI). This substrate can undergo normal IC fabrication and resulting… More