This project enables and incentivizes adaptation of IEEE Draft Standard 1076.1 (VHDL AMS) by mixed signal (analog/digital) engineers by providing a feasible, low risk migration path for existing SPICE like models (equivalence), then adds capability beyond that of SPICE (incentive). Specific work… More

This project enables and incentivizes adaptation of IEEE Draft Standard 1076.1 (VHDL AMS) by mixed signal (analog/digital) engineers by providing a feasible, low risk migration path for existing SPICE like models (equivalence), then adds capability beyond that of SPICE (incentive). Specific work… More

This proposal demonstrates the feasibility of top-down, VHDL-based verificationof gigascale, integrated, mixed-signal system-on-a-chip for military applications.Building on FTL Systems' unique parallel-compile, parallel-execute HDLcompiler/simulator, this effort introduces novel analog solver,… More

"Next-generation military systems integrating one billion or more transistor-equivalent digital, analog, and high frequency components may be iteratively verified more than 100 times as rapidly by technology developed and evaluated in this project.Specifically FTL Systems extends the VHDL-AMS design… More

In order to capture incoming data streams at tens of terabits per second continuously or for tens of minutes, it is useful to preprocess the data as close to the collector as possible, then make either the digested data or raw segments of interest available via conventional networking and remote… More

Deriving coherent antenna array clocks from a common tapped delay line driven by a synchronizing pulse per clock cycle results in reduced jitter and optimal beam forming at minimal cost. Phase one effort analytically considers both electronic and optical implementations with an option for… More

Cross-correlation technology investigated in this effort improve electronic warfare and signals intelligence capability relative to that which is known to be deployed. Agility enables detection of new threats followed by rapid, in-theater generation of robust detection templates. Robust templates… More

Streaming 10GHz+ analog-bandwidth data from two high precision, synchronized, sigma-delta analog to digital converters are captured in a cyrogenic environment via a unique low noise amplifier array. A commercial optical data pathway, multi-TeraFLOP processor and conventional networking provide… More

Tunable clocks targeting 10GHz through greater than 70GHz are optically generated, distributed and interfaced into an array of one or more cyrogenic, electronic operating environments. Design criteria include exceptionally low jitter and skew between clocks presented to each array element (less… More

Reception of numerous, concurrent emitters may be accomplished through a novel ultra-high frequency ADC, novel cross-correlator and novel real time template-generation software running on a high performance computer. Implementation of the hardware uses both superconducting electronics and cryoCMOS.

Real-time compensation techniques investigated in this effort can improve the precision and accuracy of Superconducting Analog to Digital Converters. Converters of interest include Sigma-Delta (BP and Wide/Base Band), Flash and Time-Interleaved Flash architectures. Compensation techniques utilize… More