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Company Information:

Company Name:
FTL Systems, Inc.
Address:
1620 Greenview DR SW
Rochester, MN
Phone:
(507) 288-3154
URL:
EIN:
411818690
DUNS:
928507755
Number of Employees:
8
Woman-Owned?:
No
Minority-Owned?:
No
HUBZone-Owned?:
No

Commercialization:

Has been acquired/merged with?:
N/A
Has had Spin-off?:
N/A
Has Had IPO?:
N/A
Year of IPO:
N/A
Has Patents?:
N/A
Number of Patents:
N/A
Total Sales to Date $:
$ 0.00
Total Investment to Date $
$ 0.00
POC Title:
N/A
POC Name:
N/A
POC Phone:
N/A
POC Email:
N/A
Narrative:
N/A

Award Totals:

Program/Phase Award Amount ($) Number of Awards
SBIR Phase I $476,413.00 6
SBIR Phase II $2,785,859.00 5

Award List:

CAD Conversion Tools for VHDL-AMS Library Generation

Award Year / Program / Phase:
1997 / SBIR / Phase I
Award Amount:
$99,628.00
Agency / Branch:
DOD / USAF
Principal Investigator:
John Willis/tom Eckenrode
Abstract:
This project enables and incentivizes adaptation of IEEE Draft Standard 1076.1 (VHDL AMS) by mixed signal (analog/digital) engineers by providing a feasible, low risk migration path for existing SPICE like models (equivalence), then adds capability beyond that of SPICE (incentive). Specific work… More

CAD Conversion Tools for VHDL-AMS Library Generation

Award Year / Program / Phase:
1998 / SBIR / Phase II
Award Amount:
$746,173.00
Agency / Branch:
DOD / USAF
Principal Investigator:
John Willis/tom Eckenrode
Abstract:
This project enables and incentivizes adaptation of IEEE Draft Standard 1076.1 (VHDL AMS) by mixed signal (analog/digital) engineers by providing a feasible, low risk migration path for existing SPICE like models (equivalence), then adds capability beyond that of SPICE (incentive). Specific work… More

Next Generation CAD Tools for Gigascale Integrated Mixed Signal System on a Chip

Award Year / Program / Phase:
2001 / SBIR / Phase I
Award Amount:
$99,000.00
Agency / Branch:
DOD / DARPA
Principal Investigator:
Abstract:
This proposal demonstrates the feasibility of top-down, VHDL-based verificationof gigascale, integrated, mixed-signal system-on-a-chip for military applications.Building on FTL Systems' unique parallel-compile, parallel-execute HDLcompiler/simulator, this effort introduces novel analog solver,… More

Gigascale, Mixed-Signal, Integrated System Verification

Award Year / Program / Phase:
2002 / SBIR / Phase II
Award Amount:
$375,000.00
Agency / Branch:
DOD / DARPA
Principal Investigator:
Abstract:
"Next-generation military systems integrating one billion or more transistor-equivalent digital, analog, and high frequency components may be iteratively verified more than 100 times as rapidly by technology developed and evaluated in this project.Specifically FTL Systems extends the VHDL-AMS design… More

Streaming Data Capture, Processing and Network Access

Award Year / Program / Phase:
2006 / SBIR / Phase I
Award Amount:
$69,369.00
Agency / Branch:
DOD / NAVY
Principal Investigator:
Abstract:
In order to capture incoming data streams at tens of terabits per second continuously or for tens of minutes, it is useful to preprocess the data as close to the collector as possible, then make either the digested data or raw segments of interest available via conventional networking and remote… More

Array Clocking with Reduced Jitter Using Taped Delay Lines

Award Year / Program / Phase:
2006 / SBIR / Phase I
Award Amount:
$69,369.00
Agency / Branch:
DOD / NAVY
Principal Investigator:
Abstract:
Deriving coherent antenna array clocks from a common tapped delay line driven by a synchronizing pulse per clock cycle results in reduced jitter and optimal beam forming at minimal cost. Phase one effort analytically considers both electronic and optical implementations with an option for… More

Agile, Robust and Concurrent Cross-Correlation From HF Through Ka Band

Award Year / Program / Phase:
2008 / SBIR / Phase I
Award Amount:
$69,966.00
Agency / Branch:
DOD / NAVY
Principal Investigator:
Abstract:
Cross-correlation technology investigated in this effort improve electronic warfare and signals intelligence capability relative to that which is known to be deployed. Agility enables detection of new threats followed by rapid, in-theater generation of robust detection templates. Robust templates… More

Streaming Data Capture, Processing and Network Access from Array of Superconducting Analog to Digital Converters

Award Year / Program / Phase:
2008 / SBIR / Phase II
Award Amount:
$548,316.00
Agency / Branch:
DOD / NAVY
Principal Investigator:
Abstract:
Streaming 10GHz+ analog-bandwidth data from two high precision, synchronized, sigma-delta analog to digital converters are captured in a cyrogenic environment via a unique low noise amplifier array. A commercial optical data pathway, multi-TeraFLOP processor and conventional networking provide… More

Low-Jitter/Skew, Tunable, High Bandwidth Clock Generation and Distribution into Cyrogenic Environments

Award Year / Program / Phase:
2008 / SBIR / Phase II
Award Amount:
$666,426.00
Agency / Branch:
DOD / NAVY
Principal Investigator:
Abstract:
Tunable clocks targeting 10GHz through greater than 70GHz are optically generated, distributed and interfaced into an array of one or more cyrogenic, electronic operating environments. Design criteria include exceptionally low jitter and skew between clocks presented to each array element (less… More

Agile, Robust and Concurrent Cross-Correlation From HF Through Ka Band

Award Year / Program / Phase:
2009 / SBIR / Phase II
Award Amount:
$449,944.00
Agency:
DOD
Principal Investigator:
John Willis, CEO – (507) 288-3154
Abstract:
Reception of numerous, concurrent emitters may be accomplished through a novel ultra-high frequency ADC, novel cross-correlator and novel real time template-generation software running on a high performance computer. Implementation of the hardware uses both superconducting electronics and cryoCMOS.

Compensation of Superconducting ADC for Improved Accuracy

Award Year / Program / Phase:
2010 / SBIR / Phase I
Award Amount:
$69,081.00
Agency / Branch:
DOD / NAVY
Principal Investigator:
Abstract:
Real-time compensation techniques investigated in this effort can improve the precision and accuracy of Superconducting Analog to Digital Converters. Converters of interest include Sigma-Delta (BP and Wide/Base Band), Flash and Time-Interleaved Flash architectures. Compensation techniques utilize… More