Laser application for noncontact temperature measurement of a semiconductor wafer is being developed. the technique can be applied for either chemical vapor deposition (cvd) or by rapid thermal processing (rtp) systems. the method is based on thermal expansion of a semiconductor wafer, and uses… More

We propose a systematic investigation of crystalline Si structures as their dimensions are reduced to quantum sizes (5-10 nm). For convenience, we have chosen Si on insulator (SOI) material for optical and electrical characterization. Our nanofabrication approach relies on simple laser… More

This phase I SBIR research effort addresses low-cost, large area development of a universal, compliantsilicon substrate technology for heteroepitaxial growth of compound semiconductor thin films. Due tolattice and thermal expansion coefficient mismatches, pseudomorphic growth beyond critical… More

This Small Business Innovation Research (SBIR) Phase I project will develop thin film (less than 50 microns) crystalline silicon (Si) photovoltaic (PV) cells. At present, Si wafers account for approximately 50 per cent of the completed PV module cost. Weak near-infrared absorption requires… More

"This Phase II SBIR research effort addresses several approaches aimed at minimizing lattice constant and thermal expansion mismatches during heteroepitaxial growth of thick (~ several microns) films on Si substrates. A major focus of the research effortwould be one valuation of sub-50-nm linewidth… More

This phase I SBIR proposal addresses development of low voltage (< 10 V), high current (~ 10 ¿A/tip) nanoscale Si field emission deveices capable of operating at atmospheric pressure. Earlier work has demonstrated the feasibility of low-voltage operation in air, however, either the currents were… More

This phase II SBIR proposal is aimed at development of low-power field emission display devices. Flat panel display market is one of the fastest growing technology sectors. Despite its fundamental strengths, the role of field emission (FE) technology in the market place is marginal at best. This is… More

This phase I SBIR proposal addresses development of a generalized benign, high throughput, low-cost silicon die thinning etch tool. Thinning of Si dies is required in many advanced 3-D packaging, rad-hard and flexible-circuit electronics. For example, using hyper-thin (~ 10-25 m) Si memory… More

This phase I proposal addresses ultra-thinning (~ 5-10 micrometer) of Si wafers and memory dies through a mix and match approach in which advanced deep reactive ion etching (DRIE)and pulsed laser etching (PLE)methods are used for coarse and plasmaless XeF2 vapor etching for fine thinning.… More

This phase I STTR proposal is aimed at reducing cost of energy generation in crystalline silicon solar cells. Cost of the Si wafer itself accounts for over 50 % of energy conversion, therefore, economic use of Si can potentially reduced costs by a factor of 10 by reducing current mass/watt ratios of… More

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5). This Small Business Technology Transfer Phase I project will apply high aspect ratio, nm-scale, columnar, and crystalline Si structures as templates for high-quality growth of thin-film GaAs solar… More