You are here

Software Defined Wideband DREX Receiver

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: HQ0006-10-C-7385
Agency Tracking Number: B09B-003-0073
Amount: $99,998.00
Phase: Phase I
Program: STTR
Solicitation Topic Code: MDA09-T003
Solicitation Number: 2009.B
Timeline
Solicitation Year: 2009
Award Year: 2010
Award Start Date (Proposal Award Date): 2010-05-03
Award End Date (Contract End Date): 2010-11-02
Small Business Information
210 Airport Street Quonset Point
North Kingstown, RI 02852
United States
DUNS: 041546834
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 William Weedon
 CEO
 (401) 295-0062
 wweedon@appliedradar.com
Business Contact
 Michael Sherry
Title: President
Phone: (401) 295-0062
Email: msherry@appliedradar.com
Research Institution
 MIT Lincoln Laboratory
 Natalya Luciw
 
244 Wood Street
Lexington, MA 2420
United States

 (781) 981-2484
 Federally Funded R&D Center (FFRDC)
Abstract

To realize next generation missile defense radar systems with a significant improvement in performance requires more cost effective system implementations. Software defined radar (SDR) technologies together with field programmable gate array (FPGA) implementations promise reusable and low cost DREX multichannel receivers in smaller form factors. Real time firmware reconfiguration enables radar mode modifications in response to dynamic signal environments. To validate these capabilities and advantages, our team will investigate three advanced missile defense radar SDR benchmarks: 1) multichannel digital equalizers to compensate for manufacturing variances, 2) dynamically assignable channelized (DAC) filtering to enable spectral resource management and 3) multichannel independent phase dithering for system spur reduction. We will follow a modular, macro-based firmware development process that maximizes firmware maintenance and reuse. Our existing DREX prototyping testbed will be used to demonstrate the channelized SDR firmware. The innovative spur reduction processing incorporates novel SDR firmware into unique chip-level CMOS synthesizer hardware developed by our research partner. Application consistency is maintained through the use of ROSA open system interfaces. Our team’s unique background in missile defense radar research enables us to conduct hardware tradeoffs of SDR radar technology during Phase I to confirm the benefits of software defined radar technology.

* Information listed above is at the time of submission. *

US Flag An Official Website of the United States Government