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Company Information:

Company Name: GoofyFoot Labs
City: Plano
State: TX
Zip+4: -
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No
Phone: (617) 642-0857

Award Totals:

Program/Phase Award Amount ($) Number of Awards
SBIR Phase I $323,995.00 3
SBIR Phase II $1,749,048.00 2

Award List:

Design and Fabrication Techniques for 3-Dimensional Integrated Circuits

Award Year / Program / Phase: 2009 / SBIR / Phase I
Agency / Branch: DOD / DARPA
Principal Investigator: Nisha Checka, Chief Executive Officer/Founder
Award Amount: $99,000.00
Abstract:
The 3-D integration of systems through monolithic wafer stacking is an emerging technology that can alleviate power, delay, and area problems for digital circuits and can enable a host of new applications in the System-on-Chip design space. Currently, CAD tools for 3-D integration are severely… More

Design and Fabrication Techniques for 3-Dimensional Integrated Circuits

Award Year / Program / Phase: 2010 / SBIR / Phase II
Agency: DOD
Principal Investigator: Nisha Checka, CEO/Founder – (617) 500-5481
Award Amount: $750,000.00
Abstract:
The 3-D integration of systems through monolithic wafer stacking is an emerging technology that can alleviate power, delay, and area problems for digital circuits and can enable a host of new applications in the system on a chip design space. Currently, CAD tools for 3-D integration are severely… More

High Performance/Throughput, Low Latency and Low Power Field Programmable Gate Array (FPGA) for Software Defined Radio (SDR) and Cognitive Radio (CR)

Award Year / Program / Phase: 2011 / SBIR / Phase I
Agency: DOD
Principal Investigator: Nisha Checka, CEO/Founder – (617) 500-5481
Award Amount: $99,995.00
Abstract:
FPGAs have become one of the most popular implementation media for digital circuits on account of their low NRE costs, field programmability, and time to market advantages over ASICs. However, FPGAs'greatest strength -- reconfigurability -- is also the source of their low performance and high… More

High Performance/Throughput, Low Latency and Low Power Field Programmable Gate Array (FPGA) for Software Defined Radio (SDR) and Cognitive Radio (CR)

Award Year / Program / Phase: 2013 / SBIR / Phase II
Agency: DOD
Principal Investigator: Nisha Checka, CEO/Founder – (617) 500-5481
Award Amount: $999,048.00
Abstract:
FPGAs are widely used in nearly every DoD electronics system because of their processing capabilities, low NRE costs, field programmability, and time to market advantages over ASICs. However, FPGAs"greatest strength reconfigurability is also the source of their low performance and high power… More

Extreme Environment, Rad Hard, High Performance, Low Power FPGA for Space Applications

Award Year / Program / Phase: 2013 / SBIR / Phase I
Agency: NASA
Principal Investigator: Nisha Checka, CEO/Founder
Award Amount: $125,000.00
Abstract:
To enable NASA's next-generation missions, there is a critical need for a reconfigurable FPGA that can withstand the wide temperatures ranges and radiation of the space environment while consuming minimal power without compromising on performance. To address this need, GoofyFoot Labs proposes… More