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VHSIC DESIGN FOR COMPUTING THE DISCRETE FOURIER TRANSFORM USING RESIDUE FERMAT…

Award Information

Agency:
Department of Defense
Branch:
Navy
Award ID:
2300
Program Year/Program:
1986 / SBIR
Agency Tracking Number:
2300
Solicitation Year:
N/A
Solicitation Topic Code:
N/A
Solicitation Number:
N/A
Small Business Information
International Supertech Labora
2442 33rd St Santa Monica, CA 90405
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Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No
 
Phase 2
Fiscal Year: 1986
Title: VHSIC DESIGN FOR COMPUTING THE DISCRETE FOURIER TRANSFORM USING RESIDUE FERMAT NUMBER SYSTEM
Agency / Branch: DOD / NAVY
Contract: N/A
Award Amount: $496,000.00
 

Abstract:

THE DEVELOPMENT OF VHSIC DEVICES PRESENTS MANY NEW AND CHALLENGING AREAS OF RESEARCH. BY USING THE RESIDUE FERMAT NUMBER SYSTEM TO IMPLEMENT A VHSIC DISCRETE FOURIER TRANSORM (DFT) IN CMOS CHIP, REQUIRED ONLY A SMALL NUMBER OF MULTIPLICATIONS. THE TRADITIONAL DFT DESIGN REQUIRED VERY LARGE NUMBER OF MULTIPLICATIONS, VERY COMPLICATED CIRCUIT, AND LARGE AREAS. THE PROPOSED NEW DESIGN DFT WOULD -RESULT IN A VERY COMPACT VLSI CHIP, VERY HIGH PERFORMANCE, AND VERY LOW POWER CONSUMPTION. THE OBJECTIVE OF THIS PROPOSAL IS TO DESIGN, DEVELOP, AND IMPLEMENT A STATE-OF-THE-ART DFT CHIP FOR ANY APPLICATIONS RELATED TO DIGITAL SIGNAL PROCESSING. THE FIRST PHASE OF THIS PROPOSAL, ATTENTION IS FOCUSED ON THE THEORETICAL BACKGROUND OF USING RESIDUE FERMAT NUMBER SYSTEM TO IMPLEMENT A DFT, AND THEN FOCUSED ON THE POSSIBLE CONFIGURATION OF LOGIC STRUCTURES. THE PHYSICAL IMPLEMENTATION OF THE DFT WILL BE A 16-POINT DFT.

Principal Investigator:

Trieu-kien Truong
2133982785

Business Contact:

Small Business Information at Submission:

International Supertech Labora
2442 33rd St Santa Monica, CA 90405

EIN/Tax ID:
DUNS: N/A
Number of Employees:
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No