USA flag logo/image

An Official Website of the United States Government

An Efficient Parallel SAT Solver Exploiting Multi-Core Environments

Award Information

Agency:
National Aeronautics and Space Administration
Branch:
N/A
Award ID:
90548
Program Year/Program:
2010 / SBIR
Agency Tracking Number:
085391
Solicitation Year:
N/A
Solicitation Topic Code:
X1
Solicitation Number:
N/A
Small Business Information
Aries Design Automation, LLC
2705 West Byron Street Chicago, IL 60618-3745
View profile »
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No
 
Phase 2
Fiscal Year: 2010
Title: An Efficient Parallel SAT Solver Exploiting Multi-Core Environments
Agency: NASA
Contract: NNX10CA19C
Award Amount: $600,000.00
 

Abstract:

The hundreds of stream cores in the latest graphics processors (GPUs), and the possibility to execute non-graphics computations on them, open unprecedented levels of parallelism at a very low cost. In the last 6 years, GPUs had an increasing performance advantage of an order of magnitude relative to x86 CPUs. Furthermore, this performance advantage will continue to increase in the next 20 years because of the scalability of the chip manufacturing processes. The goal of this project is to efficiently exploit the GPU parallelism in order to accelerate the execution of a Boolean Satisfiability (SAT) solver. SAT has a wide range of applications, including formal verification and testing of software and hardware, scheduling and planning, cryptanalysis, and detection of security vulnerabilities and malicious intent in software. We bring a tremendous expertise in SAT solving, formal verification, and solving of Constraint Satisfaction Problems (CSPs) by efficient translation to SAT. In our previous work (done on the expenses of our company) we achieved 2 orders of magnitude speedup in solving Boolean formulas from formal verification of complex pipelined microprocessors, 4 orders of magnitude speedup in SAT-based solving of CSPs, and 8 orders of magnitude speedup in SAT-based routing of optical networks. During Phase 1 we implemented a prototype of a parallel GPU-based SAT solver that is 1

Principal Investigator:

Miroslav N. Velev
Principal Investigator
7738566633
miroslav.velev@aries-da.com

Business Contact:

Miroslav N. Velev
Business Official
7737736633
miroslav.velev@aries-da.com
Small Business Information at Submission:

Aries Design Automation, LLC
2705 W Byron St Chicago, IL 60618

EIN/Tax ID: 202887585
DUNS: N/A
Number of Employees:
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No