Fiscal Year:
2007
Title:
Advanced IC Design Techniques for the Prevention of Reverse Engineering of the Programmed Functionality in FPGAs
Agency / Branch:
DOD / MDA
Contract:
HQ0006-07-C-7655
Award Amount:
$999,998.00
Abstract:
Military and space-application FPGAs are invaluable for improving defense capabilities and deployment schedules; however, they also create a potential vulnerability if their configuration code can be discerned or if they can be directly used in unauthorized systems. Modern IC debug and repair techniques, such as PICA and FIB, represent formidable attack tools, which when combined with other attack strategies (such as electromagnetic [EM], power analysis [PA], and Power-Cycling) and sufficient time could defeat present-day FPGA security systems. This Phase 2 STTR effort will create novel circuits and procedures that realize FPGA security features that defeat the above attack strategies, protect the FPGA configuration store, and render the device unusable by a potential aggressor. Robust encryption techniques will protect the FPGA configuration code and IO paths from discernment by unauthorized users. Each IC will be programmed with unique hardware keys that can only be reverse engineered destructively. A defense-in-depth strategy includes robust symmetric encryption circuits that are immune to EM, PA, and LVP and PICA optical probing. Distributed attack detection circuits and IC disabling circuits will defeat exhaustive key searches and power-cycling.
Small Business Information at Submission:
MICROELECTRONICS RESEARCH DEVELOPMENT CO
4775 Centennial Avenue, Suite 130 Colorado Springs, CO 80919
EIN/Tax ID:
141929743
DUNS:
N/A
Number of Employees:
Woman-Owned:
No
Minority-Owned:
No
HUBZone-Owned:
No
Research Institution Information:
ARIZONA STATE UNIV.
Research & Sponsored Projects
PO Box 873503
Tempe, AZ 85287 3503
Contact:
Larry Clark
Contact Phone:
(480) 727-0295
RI Type:
Nonprofit college or university