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Compliant Foil Bearings for Advanced Oil-Free Turbomachinery

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: 99WPO-208
Agency Tracking Number: 99WPO-208
Amount: $95,000.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: N/A
Solicitation Number: N/A
Timeline
Solicitation Year: N/A
Award Year: 1999
Award Start Date (Proposal Award Date): N/A
Award End Date (Contract End Date): N/A
Small Business Information
437 New Karner Rd
Albany, NY 12205
United States
DUNS: N/A
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Hooshang Heshmat
 (518) 862-4288
Business Contact
Phone: () -
Research Institution
N/A
Abstract

Not Available Leadership in every aspect of Information Technology (IT) has been a key element of U.S. economic dominance. At the brink of the 21st century, applications in medicine, communication, military and even artificial intelligence are awaiting the era of giga-hertz technology. In order to achieve the needed performance, new High K dielectric materials and deposition techniques are essential for the pursuance of the development of memory cells and advanced CMOS gate insulators. The SIA National Technology Roadmap for Semiconductor (NTRS) has alerted the development community of these shortcommings, which may seriously affect the progress of the electronics industry. This program proposes to demonstrate the feasibility of a high purity novel method for deposition of new high-K dielectrics integrated with metal films. The design intent includes high reliability (commercial maintainability) features at the outset. The proof-of-concept provides a critical capability for engineering advanced integrated dielectrics with already developed metal barriers for the realization of integrated metal-insulator-metal (MIM) structures. The deposition method enables processes for controlling dielectrics at the atomic level, while meeting 0.1-0.05 um generation needs (through the year 2012) for uniform, conformal deposition on large area wafers using low process temperature.

* Information listed above is at the time of submission. *

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