Securely configurable gate arrays utilizing anti-tamper memory
Agency / Branch:
DOD / MDA
This Small Business Technology Transfer Phase I project proposal describes a program to develop secure FPGA architectures and configuration algorithms that exploit the unique capabilities of a new anti-tamper memory technology called AT-MRAM, that provides strong protection against invasive attacks used to recover the intellectual property stored in the FPGA configuration. AT-MRAM provides protective layers, that when breached cause the data stored in the memory to be erased with no remanence. The erasure mechanism does not require applied power. The AT-MRAM protective layers also function as electromagnetic shielding, providing immunity to EM-based side-channel attacks. In addition, AT-MRAM is intrinsically radiation hard. There is not a single secure FPGA available today with an unpowered zero-remanence erasure feature that is triggered by removal of shielding layers. This unique capability will greatly enhance FPGA security.
Small Business Information at Submission:
Director Government Contract Adm.
Research Institution Information:
NVE CORP. (FORMERLY NONVOLATILE ELECTRONICS, INC.
11409 Valley View Road Eden Prairie, MN 55344
Number of Employees:
OREGON STATE UNIV.
School of EE and CS Rm. 1148 K
Corvallis, OR 97331
Nonprofit college or university