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Company Information:

Company Name:
Nycb Real-time Computing, Inc.
Address:
18 Meudon Drive
Locust Valley, NY 11560
Phone:
(516) 759-0707
URL:
N/A
EIN:
112623106
DUNS:
134600477
Number of Employees:
1
Woman-Owned?:
No
Minority-Owned?:
No
HUBZone-Owned?:
No

Commercialization:

Has been acquired/merged with?:
N/A
Has had Spin-off?:
N/A
Has Had IPO?:
N/A
Year of IPO:
N/A
Has Patents?:
N/A
Number of Patents:
N/A
Total Sales to Date $:
$ 0.00
Total Investment to Date $
$ 0.00
POC Title:
N/A
POC Name:
N/A
POC Phone:
N/A
POC Email:
N/A
Narrative:
N/A

Award Totals:

Program/Phase Award Amount ($) Number of Awards
SBIR Phase I $555,926.00 9
SBIR Phase II $2,955,084.00 6

Award List:

DEVELOPMENT OF 32 BIT SINGLE BOARD COMPUTER SYSTEMS IN FASTBUS PACKAGING

Award Year / Program / Phase:
1983 / SBIR / Phase I
Award Amount:
$49,000.00
Agency:
DOE
Principal Investigator:
Eric J. Siskind Ph.d.
Abstract:
N/a

DEVELOPMENT OF 32 BIT SINGLE BOARD COMPUTER SYSTEMS IN FASTBUS PACKAGING

Award Year / Program / Phase:
1984 / SBIR / Phase II
Award Amount:
$499,992.00
Agency:
DOE
Principal Investigator:
Eric J. Siskind Ph.d.
Abstract:
A fastbus packaged 32 bit computing system including both fastbus hardware and software for program development, debugging, and run-time support will be developed. the hardware will feature a 32 bit cpu, preferably implementing the dec vax architecture, but not immediately excluding current… More

DEVELOPMENT OF HIGH BANDWIDTH FASTBUS DATA PREPROCESSING MODULES

Award Year / Program / Phase:
1985 / SBIR / Phase I
Award Amount:
$48,924.00
Agency:
DOE
Principal Investigator:
Dr. Eric J. Siskind , Principal Investigator
Abstract:
N/a

DEVELOPMENT OF HIGH BANDWIDTH FASTBUS DATA PREPROCESSING MODULES

Award Year / Program / Phase:
1986 / SBIR / Phase II
Award Amount:
$500,000.00
Agency:
DOE
Principal Investigator:
Dr. Eric J. Siskind , Principal Investigator
Abstract:
This project will develop a fastbus preprocessing module designed to provide a programmable means of calibrating and reducing large streams of data from relatively unintelligent digitizer modules in a fastbus crate. this this processor will be able to eliminate data from empty channels, perform… More

ULTRA HIGH-SPEED STORAGE FOR MINIMALLY INVASIVE IMAGING

Award Year / Program / Phase:
1986 / SBIR / Phase I
Award Amount:
$40,000.00
Agency:
HHS
Principal Investigator:
Eric J Siskind , Principal Investigator
Abstract:
N/a

ULTRA HIGH-SPEED STORAGE FOR MINIMALLY INVASIVE IMAGING

Award Year / Program / Phase:
1987 / SBIR / Phase II
Award Amount:
$267,000.00
Agency:
HHS
Principal Investigator:
Eric J Siskind , Principal Investigator
Abstract:
The offeror proposes to develop a system for rapid storage and retrieval of very large quantities of digital image datasuch as might be found in the next generation of digital subtracted-angiography systems designed for minimally invas-ive imaging of the coronary arteries or other deep arteries.the… More

THE DEVELOPMENT OF AN INTELLIGENT VAXBI FASTBUS INTERFACE

Award Year / Program / Phase:
1987 / SBIR / Phase I
Award Amount:
$49,896.00
Agency:
DOE
Principal Investigator:
Dr eric j siskind
Abstract:
An intelligent list-processing interface between the vaxbi and fastbus will be developed. the vaxbi is the 13.3 megabyte/sec backplane interconnect featured in vax 8200, 8300, 8800, and other future vax computer systems. the intent is to provide a high bandwidth gateway between a variety of vax… More

DEVELOPMENT OF A LOW COST CLUSTERED VAXBI FASTBUS INTERFACE

Award Year / Program / Phase:
1989 / SBIR / Phase I
Award Amount:
$45,360.00
Agency:
DOE
Principal Investigator:
Dr Eric J Siskind , Principal Investigator
Abstract:
N/a

DEVELOPMENT OF A LOW COST CLUSTERED VAXBI FASTBUS INTERFACE

Award Year / Program / Phase:
1990 / SBIR / Phase II
Award Amount:
$488,092.00
Agency:
DOE
Principal Investigator:
Dr Eric J Siskind , Principal Investigator
Abstract:
A low cost clustered intelligent list-processing interface between the vaxbi and fastbus will be developed. the vaxbi is the 13.3 megabyte/sec backplane interconnect featured in vax 6210 through 6240, 6310 through 6360, 8200, 8250, 8300, 8350, 8500, 8530, 8550, 8700, 8800, and 8810 through 8840… More

A FORMAT FREE GIGABIT/SECOND OPTICAL FIBER DATA ACQUISTION INTERFACE

Award Year / Program / Phase:
1992 / SBIR / Phase I
Award Amount:
$50,000.00
Agency:
DOE
Principal Investigator:
Abstract:
A data acquisition interface is being developed for elementary particle physics data transported on optical fiber at bandwidths up to one gigabit per second. the interface is intended as a development tool during the engineering of prototype data acquisition electronics for use in future large high… More

Reliable Triggered Remote Serial I/O System for High Repetition Rate Accelerators with Pulse-to-Pulse Fast Feedback

Award Year / Program / Phase:
1998 / SBIR / Phase I
Award Amount:
$75,000.00
Agency:
DOE
Principal Investigator:
Dr. Eric J. Siskind , President
Abstract:
50148-98-I Reliable Triggered Remote Serial I/O System for High Repetition Rate Accelerators with Pulse-to-Pulse Fast Feedback--NYCB Real-Time Computing, Inc., 18 Meudon Drive, Lattingtown, NY 11560-1025; (516) 759-0707 Dr. Eric J. Siskind, Principal Investigator Dr. Eric J. Siskind, Business… More

N/A

Award Year / Program / Phase:
1999 / SBIR / Phase II
Award Amount:
$600,000.00
Agency:
DOE
Principal Investigator:
Dr Eric J Siskind , President
Abstract:
N/a

Multi-processor Embedded Front-End Electronics Platform with Multi-Function Network for Pulsed Accelerator Control Systems

Award Year / Program / Phase:
2005 / SBIR / Phase I
Award Amount:
$99,996.00
Agency:
DOE
Principal Investigator:
Abstract:
78911S Electronics for pulsed front-end devices at pulsed particle accelerators are typically accessed through up to 4 networks, which carry timing information, pulse-to-pulse sequencing, real-time streaming data, and configuration information, respectively. Although modern commercial networks… More

Multi-processor Embedded Front-End Electronics Platform with Multi-Function Network for Pulsed Accelerator Control Systems

Award Year / Program / Phase:
2006 / SBIR / Phase II
Award Amount:
$600,000.00
Agency:
DOE
Principal Investigator:
Abstract:
Electronics for pulsed front-end devices at pulsed particle accelerators are typically accessed through up to 4 networks, which carry timing information, pulse-to-pulse sequencing, real-time streaming data, and configuration information, respectively. Although modern commercial networks offer a… More

Front-End Networked Data Acquisition Interface with Vector Preprocessing Capabilities

Award Year / Program / Phase:
2008 / SBIR / Phase I
Award Amount:
$97,750.00
Agency:
DOE
Principal Investigator:
Abstract:
The data acquired from high-bandwidth high-resolution detectors, such as in Elementary Particle Physics experiments, often requires significant digital signal processing before it is used in triggering or pattern recognition algorithms. This processing, although not extremely complicated… More