A fastbus packaged 32 bit computing system including both fastbus hardware and software for program development, debugging, and run-time support will be developed. the hardware will feature a 32 bit cpu, preferably implementing the dec vax architecture, but not immediately excluding current… More

This project will develop a fastbus preprocessing module designed to provide a programmable means of calibrating and reducing large streams of data from relatively unintelligent digitizer modules in a fastbus crate. this this processor will be able to eliminate data from empty channels, perform… More

The offeror proposes to develop a system for rapid storage and retrieval of very large quantities of digital image datasuch as might be found in the next generation of digital subtracted-angiography systems designed for minimally invas-ive imaging of the coronary arteries or other deep arteries.the… More

An intelligent list-processing interface between the vaxbi and fastbus will be developed. the vaxbi is the 13.3 megabyte/sec backplane interconnect featured in vax 8200, 8300, 8800, and other future vax computer systems. the intent is to provide a high bandwidth gateway between a variety of vax… More

A low cost clustered intelligent list-processing interface between the vaxbi and fastbus will be developed. the vaxbi is the 13.3 megabyte/sec backplane interconnect featured in vax 6210 through 6240, 6310 through 6360, 8200, 8250, 8300, 8350, 8500, 8530, 8550, 8700, 8800, and 8810 through 8840… More

A data acquisition interface is being developed for elementary particle physics data transported on optical fiber at bandwidths up to one gigabit per second. the interface is intended as a development tool during the engineering of prototype data acquisition electronics for use in future large high… More

50148-98-I Reliable Triggered Remote Serial I/O System for High Repetition Rate Accelerators with Pulse-to-Pulse Fast Feedback--NYCB Real-Time Computing, Inc., 18 Meudon Drive, Lattingtown, NY 11560-1025; (516) 759-0707 Dr. Eric J. Siskind, Principal Investigator Dr. Eric J. Siskind, Business… More

78911S Electronics for pulsed front-end devices at pulsed particle accelerators are typically accessed through up to 4 networks, which carry timing information, pulse-to-pulse sequencing, real-time streaming data, and configuration information, respectively. Although modern commercial networks… More

Electronics for pulsed front-end devices at pulsed particle accelerators are typically accessed through up to 4 networks, which carry timing information, pulse-to-pulse sequencing, real-time streaming data, and configuration information, respectively. Although modern commercial networks offer a… More

The data acquired from high-bandwidth high-resolution detectors, such as in Elementary Particle Physics experiments, often requires significant digital signal processing before it is used in triggering or pattern recognition algorithms. This processing, although not extremely complicated… More