A 32x32 CTIA readout multiplexer for far IR detector arrays
We propose to investigate the feasibility of developing a 32x32 multi-gain readout multiplexer with the following key design features:1- Optimized for use with infrared detector arrays requiring low bias levels, such as Ge:Ga far IR photoconductors. The unit-cell design will maintain constant bias across the detector during the integration and, thereby, will eliminate non-linearity and detector debiasing. The design will also minimize the channel-to-channel DC variation which improves the bias uniformity across all pixels of the array.2- Capable of operation at cryogenic temperatures down to 1.5K. Advanced monolithic cryo-CMOS technology will guarantee deep cryogenic operation with minimal impact on noise performance.3- Offers the potential of being directly hybridized to IR detector arrays using indium-bump technology.No two-dimensional readout multiplexer with these features is currently available or has been developed. This effort fits well within the scope of the SBIR Subtopic S3.03 and will be a benefit to many large and small NASA projects including NGST, SOFIA, and Astrobiology missions.
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