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Design of GPS Receiver Module on a Single Silicon Chip

Award Information

Department of Defense
Defense Advanced Research Projects Agency
Award ID:
Program Year/Program:
1997 / SBIR
Agency Tracking Number:
Solicitation Year:
Solicitation Topic Code:
Solicitation Number:
Small Business Information
25500 Hawthorne Blvd., Suite 2300 Torrance, CA 90505
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Woman-Owned: No
Minority-Owned: Yes
HUBZone-Owned: No
Phase 1
Fiscal Year: 1997
Title: Design of GPS Receiver Module on a Single Silicon Chip
Agency / Branch: DOD / DARPA
Contract: N/A
Award Amount: $98,995.00


Recent years have seen the size of GPS receivers shrink dramatically due to higher levels of integration. A GPS receiver consists of a combination of RF and IF circuitry, filters, analog to digital converts (ADC) and a digital Signal Processor (DSP) engine. One of the remaining factors preventing further integration is the necessity of a Surface Acoustic Wave (SAW) filter and dielectric filters. These filters are usually large in size compared to the chip package and can be expensive. We are proposing a solution to these problems by integrating all external functions and components such as filters, the Oscillator tank circuitry, and the DSP engine onto a single substrate, reducing the size and cost. Because this chip would be CMOS, adding a digital demodulator will be trivial. In addition, we will add programmability to the GPS receiver that will allow it to demodulate all aspects of the GPS signals in both RF bands. We can achieve these goals through an innovative architecture and state-of-the-art circuit design. This level of integration has not yet been achieved because the necessary circuits and techniques have only been pioneered and demonstrated in the past few years by our design team.

Principal Investigator:

Reza Rofougaran

Business Contact:

Small Business Information at Submission:

Physical Research, Inc.
25500 Hawthorne Blvd., Suite 2300 Torrance, CA 90505

Number of Employees:
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No