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SI/GE OPTICAL BUS ARRAY AND BINARY FANOUT HOLOGRAM FOR SI-BASED VLSI…

Award Information

Agency:
Department of Defense
Branch:
Missile Defense Agency
Award ID:
25594
Program Year/Program:
1994 / SBIR
Agency Tracking Number:
25594
Solicitation Year:
N/A
Solicitation Topic Code:
N/A
Solicitation Number:
N/A
Small Business Information
RADIANT RESEARCH, INC.
3006 Longhorn Blvd, Suite 105 Austin, TX 78758-0761
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Woman-Owned: Yes
Minority-Owned: No
HUBZone-Owned: No
 
Phase 1
Fiscal Year: 1994
Title: SI/GE OPTICAL BUS ARRAY AND BINARY FANOUT HOLOGRAM FOR SI-BASED VLSI WAFER-SCALE OPTOELECTRONIC INTERCONNECTS
Agency / Branch: DOD / MDA
Contract: N/A
Award Amount: $59,996.00
 

Abstract:

We propose a dratically new optoelectronic chip modules (OCMs) concepts to optically interconnect Si-based VLSI wafer-scale integrated circuits. Realizing the fact that system clock speed is three to five times higher than that ofprocessor speed, we propose to develop an optical clock signal distribution networks for wafer-scale interconnects. The architecture is to employ a superstrate Si/Ge waveguide array as the optical bus for signal distribution. Implementation of a waveguide layer on top of the Si-based VLS/ULSI circuit is due to the fact that the real estate of the Si wafer is already occupied by high packaging density transistors and logic gates. Broadcasting of clock signal requires another physical layer through which optical signal can be fanned out as requested.

Principal Investigator:

Suning Tang, Phd
5123431951

Business Contact:

Small Business Information at Submission:

Radiant Research Laboratory
10306 Sausalito Drive Austin, TX 78759

EIN/Tax ID:
DUNS: N/A
Number of Employees:
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No