Silicon Space Technology and team member ATK Mission Research, along with Jazz Semiconductor, propose to demonstrate a comprehensive methodology for TCAD simulation using leading-edge Synopsys tools. These tools are capable of 3-D process and device simulation, enabling Mixed-Mode simulations… More

Silicon Space Technology and team member ATK Mission Research, in collaboration with Jazz Semiconductor, propose to develop and demonstrate a very deep submicron cell library and design system for radiation hardened ASICs and standard products. Specifically, we will develop a scaleable 180 nm,… More

In 2000, the DOD"s Radiation Hardened Microelectronics Oversight Council (RHOC) recognized the ever-widening performance gap between the manufacturing capability of existing radiation-hardened integrated circuit (RHIC) producers and the future demands of military satellites and key terrestrial… More

Silicon Space Technology (with Harris and LSI Logic) proposes to demonstrate innovative RH enhancement of an ASIC component, using improved RH manufacturing technologies, capable of reliable operation in the BMDS for its projected mission life. Specifically, we will develop a scaleable Sierra II… More

Silicon Space Technology (with LSI Logic and Jazz Semiconductor) proposes to demonstrate an innovative manufacturing process technology implementing our hardened-by-isolation (HBI) approach for near-term insertion into BMD discrete components. We will develop scaleable bulk test circuit elements… More

Silicon Space Technology (SST), working with Texas Instruments (TI), proposes to demonstrate an innovative approach for converting a high-performance COTS ADC circuit (radiation-soft) to a radiation-hardened circuit by integrating two new process modules into the commercial process. Silicon Space… More

Silicon Space Technology (SST) has solved the major space radiation problems, Single-Event Effects and Total Ionizing Dose, by combining substrate engineering with layout design innovation. Working with Texas Instruments (TI) to enable radiation hardening of TI's 130nm commercial CMOS process… More

Silicon Space Technology (SST), working with Texas Instruments (TI), proposes to demonstrate an innovative approach for converting a high-performance COTS DSP circuit (radiation-soft) to a radiation-hardened circuit by integrating two new process modules into the commercial process. Silicon Space… More

Communication systems being developed for tactical space and missile defense applications must include radiation hardness as a reliability requirement. These systems will use software-defined modems and programmable encryption circuits based on high-performance integrated circuits. But with the… More

Silicon Space Technology (SST), working with Texas Instruments (TI), proposes to demonstrate an innovative approach for manufacturing radiation hardened (RH) high-density SDRAM_s for space applications by adding two proprietary RH modules plus a simple stacked capacitor structure to TI_s baseline… More

Silicon Space Technology (SST) demonstrated during Phase I that astute modifications to a commercial CMOS process can yield significant improvement to a Texas Instruments (TI) 1394B FireWire circuit's radiation hardness. SST developed a practical approach for Harden By Isolation (HBI) integration… More

Silicon Space Technology (SST) demonstrated during Phase I that astute modifications to a commercial CMOS process can yield significant improvement to Texas Instruments (TI) DSP circuits' radiation hardness. SST developed a practical approach for Harden By Isolation (HBI) integration into two… More

Silicon Space Technology (SST), working with Texas Instruments (TI), proposes to simulate, develop and demonstrate a method for radiation-hardening of TI-_s 65nm C021 process with SST-_s Buried Guard Ring (BGR) innovation. The finite width of the vulnerable region during a particle strike presents… More

Silicon Space Technology (SST), working with Texas Instruments (TI), proposes to demonstrate a method for radiation-hardening of TI-_s C027 90nm process with SST-_s Buried Guard Ring (BGR) and Parasitic Isolation Device (PID) innovations. SST plans to build upon recent successes at radiation… More

Silicon Space Technology (SST), working with Texas Instruments (TI), proposes to demonstrate the feasibility of building large (64Mb) SRAM's for space applications by applying SST's proprietary hardened-by-process (HBP) techniques to TI's 90nm C027 process. SST's HBP modules have solved the major… More

Silicon Space Technology, working with Texas Instruments (TI), proposes to demonstrate an innovative radiation-hardened (RH) high-density SDRAM by adding proprietary Hardened-by-Process (HBP) modules plus a simple capacitor structure to TIs baseline 130nm process. HBP enables production of… More

Silicon Space Technology along with its partner Texas Instruments proposes to develop, fabricate and test the world's first radiation hardened 64Mb Quad Data Rate SRAM for space applications by applying SST's proprietary hardened-by-isolation (HBI) techniques to TI's 90nm C027 process. The 64Mb QDR… More

Silicon Space Technology (SST) working with Texas Instruments (TI) proposes to demonstrate a 90nm low-power radiation-hardened (RH) metal-programmable system-on-a-chip (SOC) cell library. This will be accomplished by defining, designing, simulating and laying out a demonstration circuit that could… More

ABSTRACT: Silicon Space Technology (SST) proposes designing a customized 130nm Metal Programmable System on a Chip (MPSoC) slice based upon our 130nm fabric that can be used to implement multi-million gate designs. The slice would have embedded IP sub-circuits and IO interfaces that can be used to… More