Fiscal Year:
1987
Title:
COMPUTER ARCHITECTURE/VERY HIGH LEVEL LANGUAGE DESIGN FOR BATTLE MANAGEMENT
Agency / Branch:
DOD / MDA
Contract:
N/A
Award Amount:
$161,000.00
Abstract:
A STUDY OF THE EFFICIENCIES AND ENGINEERING TRADE-OFFS INTEGRATING REDUNDANT NUMBER SYSTEM WITH SYSTOLIC ARRAY PROCESSING ELEMENTS IN ORDER TO CAPTURE THE INHERENT FAULT TOLERANT PROPERTIES OF SIGNED DIGITS IS PROPOSED. USING SIGNED DIGITS REDUCES CARRY/BORROW DISTANCE TO A MINIMUM THUS REALIZING HIGHLY MODULARIZED AND COLUMNAR ARITHMETIC ENGINES. PROCESSING CELLS BECOME REGULAR WITH FEWER INTERCONNECTIONS BETWEEN CELLS, THUS REDUCING VLSI WIRE INTERCONNECT SPACE. YIELDS INCREASE AND LESS POWER IS NECESSARY. FAULT TOLERANT AND MORE RELIABLE CIRCUITS ALSO RESULT BECAUSE OF THE REGULAR YET SIMPLER PE'S. LESS INTERCONNECTS AND SIMPLER CIRCUITS MAY RESULT IN HIGHER RAD HARDENING YIELDS.
Principal Investigator:
Michael Andrews
3034849903
Business Contact:
Small Business Information at Submission:
Space Tech Corp
2324 Manchester Ct. Ft. Collins, CO 80526
EIN/Tax ID:
DUNS:
N/A
Number of Employees:
Woman-Owned:
No
Minority-Owned:
No
HUBZone-Owned:
No