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Reconfigurable Integrated Fault Tolerance for Spaceborne Systems (RIFTSS)

Award Information

Agency:
Department of Defense
Branch:
Air Force
Award ID:
52351
Program Year/Program:
2001 / SBIR
Agency Tracking Number:
011IF-0505
Solicitation Year:
N/A
Solicitation Topic Code:
N/A
Solicitation Number:
N/A
Small Business Information
SYSTRAN FEDERAL CORP.
4027 Colonel Glenn Highway Suite 210 Dayton, OH 45431-1672
View profile »
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No
 
Phase 1
Fiscal Year: 2001
Title: Reconfigurable Integrated Fault Tolerance for Spaceborne Systems (RIFTSS)
Agency / Branch: DOD / USAF
Contract: F33615-01-M-1877
Award Amount: $99,931.00
 

Abstract:

Reconfigurable Computing (RC) is a technology in which the behavior of a processingsystem is changed by altering the hardware, rather than the software. This isachieved though the use of field programmable gate arrays (FPGAs). RC is usefulwhen a high degree of both performance and flexibility is needed, and especiallywhen size, weight, or power constraints preclude use of dedicated components forseparate functions. The recent development of high-density, rad-hard FPGAs meansthat RC now has the potential to be used in spaceborne applications. SFC iscurrently developing an RC tool suite, called DERC (Development Environment forReconfigurable Computing), which includes both hardware and software to supportdevelopment of RC applications. RIFTSS will extend the capabilities of theDERC tools to include extensive support for fault tolerance. The DERC API andlogic libraries will be extended to include fault tolerant functions, includingconfiguration scrubbing, redundancy, and voting. The DERC Debug Tool will bemodified to allow deliberate fault insertion into a design under test. To addresssystem-level fault tolerance issues, this program will also evaluate severalthird-party modeling and simulation tools to determine how effectively they canhandle the unique situations that will occur in fault tolerant RC.Reconfigurable Computing can provide both increased processing power and increasedflexibility to systems that must perform a variety of different functions. This isespecially important in systems for which weight, space, or power are at a premium(which make it particularly desirable in spaceborne applications). While RC hasgreat potential, its use to date has been small, partly due to the limited numberof development tools available. DERC will help enable greater use of RC technologyby providing a comprehensive development system for the RC application developer.DERC includes a highly flexible hardware architecture and a full set of supportingsoftware tools. The DERC hardware architecture is already well suited for faulttolerant designs. RIFTSS will extend the software tools to include support fordesign and testing of fault tolerant systems. Pre-tested fault tolerant logicfunctions will allow application developers to concentrate more effort on thefunctionality of the applications, rather than on fault tolerance. The ability toinsert deliberate faults into the design under test will speed the testing process,and support improved reliability of the design.

Principal Investigator:

Paul Rudolph
Senior Hardware Engineer
9374299008
prudolph@systranfederal.com

Business Contact:

Kenneth Baker
President
9374299008
kbaker@systranfederal.com
Small Business Information at Submission:

SYSTRAN FEDERAL CORP.
4027 Colonel Glenn Highway, Suite 210 Dayton, OH 45431

EIN/Tax ID: 311603374
DUNS: N/A
Number of Employees:
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No