Performance of Asynchronous Speed-Independent, Clock-Free Digital Circuits
Agency / Branch:
DOD / DARPA
Asynchronous digital circuits offer the potential for significant design advantages over traditional clocked logic, including elimination of timing-based faults such as races and skew. We proposed to quantify the performance of asynchronous designs relative to equivalent synchronous ones. To do so, during Phase I, we will design two or more non-trivial digital circuit functions including a small microcontroller with equivalent function to a commercially available part. We will design both asynchronous and synchronous versions, for comparison to each other as well as to the commercial version. We will compare design complexity, power consumption, device area, speed, and cost. During Phase I, we will fabricate both the sample microcontroller designs through MOSIS, so testing, and evaluation can begin immediately in Phase II. This testing will lead to optimization strategies to use in a much more aggressive Phase II design. ANTICIPATED BENEFITS: Asynchronous circuits, the benefits of which may be confirmed by the results of this effort, are ideal for low power battery-driven notebook computers and personal digital assistants (PDAs). Also, we intend to directly market the microcontroller designs developed under this research effort as library elements.
Small Business Information at Submission:
Principal Investigator:Drazen Borkovic
Tanner Research, Inc.
180 N. Vinedo Avenue Pasadena, CA 91107
Number of Employees: