"Theseus Logic intends to develop a test and verification tool and methodology that will provide the means to automatically insert testability into clockless circuits. Success in this endeavor will eliminate one of the remaining obstacles that hinderwidespread adoption of asynchronous design… More

Theseus Logic, in partnership with FTL Systems, intends to integrate test and verification into their commercial design automation tool that will aid the designer by providing the means to automatically insert testability into clockless circuits. Success in this endeavor will eliminate one of the… More

Theseus Logic, Inc. proposes a plug and play peripheral interconnect protocol that protects against obsolescence by using an asynchronous approach that does not rely on a specific clock rate. Additionally, an asynchronous approach provides robustness and flexibility that allows the same protocol… More

Existing Field Programmable Gate Arrays (FPGAs) provide space-based users with an awkward choice between high performance commercial devices that are not capable of functioning reliably in a space-borne environment, or low performance devices that are specially hardened for space environments. This… More

Low power, robust communications protocols such as IEEE 802.15.4/Zigbee have made the concept of smart sensor networks attractive across many applications. These systems promise portable, networked, wireless, sensor suites capable of monitoring and controlling environments as needed. Theseus Logic… More

Achieving a new military GPS capability based on direct acquisition of P(Y) and M codes requires massive parallel processing with large numbers of correlator channels (>1000) in the receiver searching for a code match. In synchronous systems the extensive clock tree required to support a… More