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Reconfigurable VLIW Processor for Software Defined Radio

Award Information

Agency:
National Aeronautics and Space Administration
Branch:
N/A
Award ID:
Program Year/Program:
2011 / SBIR
Agency Tracking Number:
095618
Solicitation Year:
2009
Solicitation Topic Code:
O1.03
Solicitation Number:
Small Business Information
Aries Design Automation, LLC
2705 West Byron Street Chicago, IL 60618-3745
View profile »
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No
 
Phase 2
Fiscal Year: 2011
Title: Reconfigurable VLIW Processor for Software Defined Radio
Agency: NASA
Contract: NNX11CA35C
Award Amount: $600,000.00
 

Abstract:

We will implement an environment for design, formal verification, compilation of code, and performance and power evaluation of Systems on a Chip (SOCs) consisting of heterogeneous processor cores that can be single-issue pipelined, superscalar, or VLIW, and are binary-code compatible with any existing Instruction Set Architecture (ISA). Particularly, we will ensure binary-code compatibility with the PowerPC 750 ISA, which is used in the radiation-hardened RAD750 flight-control computer that is utilized in many NASA space missions, including Deep Impact, the Mars Reconnaissance Orbiter, the Mars Rovers, and is planned to be used in the Crew Exploration Vehicle (CEV). The processor cores will have reconfigurable functional units and corresponding specialized instructions that can be optimized to accelerate any application. Our focus in this Phase 2 project will be on Software Defined Radio (SDR) applications. The radiation-hardening will be done at the microarchitectural level with a mechanism that will allow the detection and correction of all timing errors---caused not only by radiation, but also by variations in the voltage, frequency, manufacturing process, and aging of the chip. The binary-code compatibility of the processor cores with the PowerPC 750 ISA will allow them to seamlessly execute legacy binary code from previous space missions. We have made critical contributions to the fields of formal verification of complex pipelined microprocessors, and Boolean Satisfiability (SAT), and have developed highly efficient Electronic Design Automation (EDA) tools that we will use.

Principal Investigator:

Miroslav N. Velev
Principal Investigator
7737736633
miroslav.velev@aries-da.com

Business Contact:

Miroslav N. Velev
Business Official
7737736633
miroslav.velev@aries-da.com
Small Business Information at Submission:

Aries Design Automation, LLC
2705 West Byron Street Chicago, IL 60618-3745

EIN/Tax ID: 202887585
DUNS: N/A
Number of Employees:
Woman-Owned: No
Minority-Owned: No
HUBZone-Owned: No