USA flag logo/image

An Official Website of the United States Government

Integrated SiC Super Junction Transistor-Diode Devices for High-Power Motor…

Award Information

Agency:
National Aeronautics and Space Administration
Branch:
N/A
Award ID:
Program Year/Program:
2011 / SBIR
Agency Tracking Number:
105314
Solicitation Year:
2010
Solicitation Topic Code:
S3.05
Solicitation Number:
Small Business Information
GeneSiC Semiconductor Inc.
43670 Trade Center Place, Suite 155 Dulles, VA 20166-2123
View profile »
Woman-Owned: No
Minority-Owned: Yes
HUBZone-Owned: No
 
Phase 1
Fiscal Year: 2011
Title: Integrated SiC Super Junction Transistor-Diode Devices for High-Power Motor Control ModulesOoperating at 500 C
Agency: NASA
Contract: NNX11CE28P
Award Amount: $100,000.00
 

Abstract:

Monolithic Integrated SiC Super Junction Transistor-JBS diode (MIDSJT) devices are used to construct 500<SUP>o</SUP>C capable motor control power modules for direct integration with the exploration rovers required to operate in Venus-like environments. The Phase I of this proposed work will focus on the integrated MIDSJT device development and high-temperature packaging. Phase II will focus on the integration of the MIDSJT devices to construct full 3-Phase Inverter Motor Control Modules. Although SiC is the semiconductor material of choice for fabricating high-temperature (> 150<SUP>o</SUP>C) power electronics, existing SiC MOSFET and JFET based transistor device technologies perform poorly at temperatures exceeding 200<SUP>o</SUP>C. The proposed gate oxide-free Integrated MIDSJT device technology will overcome several problems associated with existing SiC device technologies by: (A) exhibiting desirable normally-OFF operation yet best-in-class on-state characteristics at temperatures as high as 500<SUP>o</SUP>C, (B) eliminating parasitic inductances/capacitances associated with interconnecting discrete devices, and (C) eliminating high-temperature gate oxide reliability issues. Special device designs and fabrication processes will be investigated in this work for reliable device operation at 500<SUP>o</SUP>C. Novel power device packaging techniques in the areas of power substrate, die-attach, chip metallization and wire bonds will be explored to demonstrate reliable module operation at 500<SUP>o</SUP>C after several thermal cycles.

Principal Investigator:

Siddarth Sundaresan
Principal Investigator
7039968200
sid@genesicsemi.com

Business Contact:

Satish Lulla
Business Official
7039968200
accounting@genesicsemi.com
Small Business Information at Submission:

GeneSiC Semiconductor Inc.
43670 Trade Center Place Suite 155 Dulles, VA -

EIN/Tax ID: 201151855
DUNS: N/A
Number of Employees:
Woman-Owned: No
Minority-Owned: Yes
HUBZone-Owned: No