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Modular Gateway Architectures Study (MGAS)
Title: Lead Research Engineer
Phone: (781) 273-3388
Email: mkeaton@alphatech.com
Title: Contracts Manager
Phone: (781) 273-3388
Email: jbarry@alphatech.com
Our SBIR goals include 1) assessing architectural alternatives for future interoperability gateways that facilitate component testing, certification, and reuse, and 2) taking initial steps to implement selected alternatives. Historically, interoperability gateways required each link interface to implement translation rules for all other supported links types, yielding an O(N2) maintenance, testing, and certification problem. More recent architectures (e.g. our XML-Defined Gateway) incorporate a neutral data format to remove link interdependencies, so that link interfaces need only support translations between its native format and the neutral format. This allows testing and certifying interface implementations individually, and assembling gateways from pre-certified interface modules: i.e., a toolbox architecture. Although attractive, a neutral format approach has the overlooked problem of generating translation rules between neutral and native formats that are complete and consistent with MIL-STD rules expressed only in native formats. We propose to design automated approaches for: decomposing native-to-native translation rules into native-to-neutral and neutral-to-native translation rules; verifying the original rules are mathematically correct compositions of the decomposed rules; and identifying when translation rules from different rule sets induce inconsistencies. We also propose to extend the engineering cost model developed under our previous SBIR to compare architectural trades and select the best overall approach.
* Information listed above is at the time of submission. *