Field Programmable Automation System (F-PAS)
Agency / Branch:
DOD / DARPA
Field Programmable Gate Arrays (FPGAs) are vastly becoming a common platform providing specific high-speed processing for DoD applications. The problem however, is that the design cycle for a typical FPGA development is very time-consuming and convoluted in nature. This proposal examines the complexities that exist in a typical FPGA design flow and the need to simplify the process. Two improvements are proposed in Phase I. The first approach is to move towards a high-level design entry scheme to remove complications that exists in low-level hardware languages. The second approach is to implement an iterative automation system to optimize and mask the complexities in an FPGA design flow. F-PAS (Field-Programmable Automation System) is our proposed platform that utilizes these two approaches to significantly reduce development time.
Small Business Information at Submission:
700 Bishop Street Suite 2000 Honolulu, HI 96813
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