High Speed RF Waveform Reader-Writer

Intelligent Automation, Inc. (IAI), proposes a reliable integrated COTS-based reader/writer that can deliver RF waveforms to a cross-correlation based RF receiver at high speeds of 40 Gbps. We have already identified key COTS hardware that offers following advantages (1) input/ Output blocks of the FPGA can handle various input/ output standards like LVDS, LVCMOS, PCI-X, GTL and GTLP. Hence external COTS hardware delivering any of these voltage formats can be easily integrated (2) Options for reconfigurable logic and signal processing blocks (3) High speed expansion slots, 16 bit TX-RX interfaces with default LVDS support and number of prototyping interfaces, and (4) Low power consumption. The key innovations which we propose are (1) assembly of COTS hardware such as 1: 16 De-serializer and 16:1 Serializer, external memory blocks for data management (2) ability to perform test simulations on the FPGA itself, by creating HDL blocks (3) ability to read 10 Gword/s and store the data using FPGA control and (4) a clear transition plan to output 40 Gbps data per line using 4: 1 Multiplexing. The proposed system can be rapidly deployed for testing within the phase I base period. BENEFITS: The market for a IEEE compliant 40 Gbps per line circuit and accept 10 Gbps per line at data input and rewrite the data in the RAM units is quite large in fiber optic telecommunication network where digital data are be compressed in time and transmitted as bursts rather than time interleaved bit with other traffic. Such networks are also used on military platforms and bursted data may be significantly easier to handle than interleaved in multi-level security and priority networks such as during battle and high speed communication processing.