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Silicon based Millimeter-Wave (MMW) sparse array radiometer receiver for photonic processing


TECHNOLOGY AREAS: Sensors, Electronics


The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), which controls the export and import of defense-related material and services. Offerors must disclose any proposed use of foreign nationals, their country of origin, and what tasks each would accomplish in the statement of work in accordance with section 3.5.b.(7) of the solicitation.

OBJECTIVE: Demonstrate a single chip silicon based circuit forming the receiver of a MMW sparse array radiometer with an output suitable for photonic processing.

DESCRIPTION:  Passive millimeter wave technology has been investigated for over five decades as a sensing modality with unique properties that may prove useful for military and commercial applications. Recent applications have ranged from screening personnel for contraband at military checkpoints and commercial distribution centers to providing video rate imaging for combat helicopters to land in degraded visual conditions such as dust, snow, and fog. Work from the 90’s up to the current time has been ongoing to demonstrate the utility of using photonics for processing the down converted (not detected) output from MMW receivers in such a manner that video cameras are used to transform images into video data streams [1]. A challenge to practically realizing such a system has been the inability to achieve sufficient sensitivity with purely photonic receivers and maintain inter-channel balance and single receiver stability in an affordable manner [2]. With recent advances in SiGe RF circuits [3], we may have reached a point where all of these issues can be addressed in a single silicon based circuit.

PHASE I:  Design the architecture of a single chip silicon based circuit forming the receiver of a MMW sparse array radiometer with an output suitable for photonic processing. Establish the potential processes ensuring the receiver is stable and calibrated, how it will achieve sufficient sensitivity to be useful in a passive MMW system, and how it will interface with a photonics processor suitable for processing sparse aperture imagery.

PHASE II:  Based on the Phase I results, design and fabricate a silicon based circuit and demonstrate capability to operate with a photonics image processor. Sufficiently demonstrate the stability of the circuit, the variations in performance from chip to chip, and the ability to interface the chip to a photonics processor. Include antennas required for matching the circuit to the scene to be imaged.

PHASE III:  Under Phase III it is expected that the performer will transition the design of the circuit developed into a system suitable for use in pilotage and navigation under degraded visual environments or in to security screening imagers used for contraband detection and security screening imagers used for military checkpoints.

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