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Vertical GaN transistors on bulk GaN substrates
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In this abstract the development of vertical power transistors utilizing bulk GaN substrates with breakdown voltages of 1200V or higher, normally-off operation, and a drain current rating of 100A is proposed. These devices will feature vertical current flow, avalanche ruggedness, and a wide operating temperature range (-55 to 150°C). The target specific on-resistance for the transistor is 30x lower than the best-in-class Si MOSFETs and its switching frequency more than 10x faster than state-of-the art IGBTs. Cost parity with silicon devices will be achieved in three years using a two prong approach. Firstly, the bulk GaN substrate price will be reduced by: (i) using a scalable ammonothermal substrate technology, (ii) enabling commercially available substrates obtained from the epitaxial lift-off process, and (iii) driving the price of GaN substrates down along with the solid-state LED lighting industry. Secondly, manufacturing cost will be reduced by predominantly using legacy silicon fabrication equipment in the Avogy facility in San Jose, CA. The transistor and technology performance metrics will be verified by an independent testing facility. Also, in this proposal gate drivers will be developed for these vertical transistors to replace existing MOSFETs and IGBTs. Finally, commercialization partners will evaluate devices and gate drives in power conversion applications.
* Information listed above is at the time of submission. *