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Hardware Open Systems Technologies (HOST) Hardware Integration Tool Set

Description:

 
 

TECHNOLOGY AREA(S): Air Platform, Electronics, Information Systems

ACQUISITION PROGRAM: Joint Strike Fighter F-35 Lightning II Program

OBJECTIVE: The Navy is seeking an innovative tool set solution for the integration of Hardware Open Standards Technologies (HOST) conformant components which will aid in component selection and component integration such that system requirements can be met at a reduced cost.

DESCRIPTION: Hardware Open Systems Technologies (HOST) is an Open Systems Architecture (OSA) which defines virtual and physical interfaces to hardware such that interoperability and reuse of hardware components can be realized. The HOST standards leverage commercial technology combined with form factor such as the VITA Standards Organization’s OpenVPX 6U standard [4, 5, 6]. The OpenVPX standard is flexible enough to allow vendor lock to occur. HOST constrains the use of the OpenVPX standard, thus preventing the opportunity for vendor lock to occur. The intent of HOST is to establish performance and interface requirements that are open, enforceable, and testable. As diminishing supplies and obsolescence become more impactful, HOST will facilitate addressing obsolescence and diminishing supplies as well as capability growth from new and/or evolving requirements.

Currently, the system integration effort is unique for each platform and labor intensive. HOST will enable a market where platforms can acquire hardware from multiple different vendors over the life of the system further complicating embedded system integration. As HOST is a new standard, no tooling currently exists to assist with easing or automating the integration of HOST components. Consequently, innovation is required to develop a set of tools (both physical and logical) to support mission computer and / or embedded processing system integration.

The purpose of this solicitation is to develop tools which can support the integration of HOST conforming hardware components. At a minimum the tool sets should be capable of modeling the following:

 

1. logical interfaces

 

2. environmental and mechanical performance

 

3. load distribution

 

4. hardware component and system level configuration

Additional modeling areas of consideration may include in rank order priority:

 

1. Built in Test (BIT)

 

2. firmware integration

 

3. error handling and reporting

 

4. debugging

 

5. alleviating performance bottlenecks and hardware optimization

 

6. power analysis

 

7. boot optimization

Tools should help systems integrators with hardware selection and provide output which integrators can use for the physical and logical integration. Modeling and simulation-driven development of embedded real-time systems published in the Simulation Modeling Practice and Theory Journal [3] articulates some of the complexities associated to the integration of embedded systems and may provide additional insight. Note that this journal entry ties the framework and tool to a specific real-time operating system, this is not within the scope of HOST. Instead, the Navy is seeking a tool that specifically addresses the HOST profiled OpenVPX 6U and 3U hardware and system software excluding any specific operating system.

PHASE I: Develop and demonstrate concept feasibility for a Hardware Open Systems Technologies (HOST) Hardware Integration Tool Set. Phase I will result in the identification of tool(s) with capabilities and methodologies for facilitating interoperable hardware integrations to meet the minimum and to the extent practicable additional modeling considerations identified in the above Description. The developed capabilities and methodologies will provide the basis for tool design and prototype build efforts during Phase II.

PHASE II: Design, build and demonstrate a prototype (HOST) Hardware Integration Tool Set which meets the objectives outlined in the “Objective” and “Description” sections above. This prototype will be based on the capabilities and methodologies identified for the HOST Hardware Integration Tool Set developed in Phase I.

PHASE III DUAL USE APPLICATIONS: Finalize and transition tool(s) and techniques for HOST hardware integration. During this process, finalize the resultant prototype tool(s) for broader market utilization in both military and commercial applications. Private Sector Commercial Potential: Manufacturers developing hardware for embedded systems and seeking to conform to the HOST standard will benefit from this / these integration tool(s). These integration tools will help to create a market ecosystem which will enable small businesses to more quickly test and incorporate new capabilities that can be provided more rapidly to the warfighter in “bite sized”, cost effective elements similar to the way in which the commercial smart phone market allows even individuals to sell new apps like “Angry Birds” to everyday smart phone users. These embedded systems span much further than just naval aviation and could be utilized within the FAA and control systems ranging from trains to nuclear reactors. In all cases, these systems have to be integrated in order to work correctly. The tools developed under this effort clearly have potential benefit to these commercial needs.

REFERENCES:

  • Hardware Open Systems Technology – Tier 1 Version 1.0.  (Uploaded in SITIS on 4/22/16.)
  • Hardware Open Systems Technology – Tier 2 Version 1.0.  (Uploaded in SITIS on 4/22/16.)
  • Modeling and simulation-driven development of embedded real-time systems (Simulation Modeling Practice and Theory Volume 38, November 2013, Pages 115–131).
  • OpenVPX Tutorial. http://www.vita.com/Tutorials
  • ANSI/VITA 48.2, VPX REDI: Mechanical Specifications for Microcomputers Using Conduction Cooling Applied to VPX.
  • ANSI/VITA 65-2010 (R2012), OpenVPX Architectural Framework for VPX.
  • For Ref. 2, uploaded file 2 of 2 -- HOST Standard Tier 2 6U v1.0 PAO SOR (2016). (Uploaded in SITIS on 4/22/16.)

KEYWORDS: Model; Optimization; Integration; Architecture; HOST; embedded system

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