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Building Die Extracted/Repackaged (DER)-Optical Hybrid Integrated Circuits (ICs) to Replace Passive Devices and Obsolete Packaged ICs in a Line Replaceable Unit (LRU) to Enhance Performance, Reliability, and Service Life

Description:

TECHNOLOGY AREA(S): Sensors 

OBJECTIVE: Determine if DER-optical hybrid circuits can be built to replace passive devices and obsolete packaged ICs on a circuit board to increase high-speed routing of information in packaged ICs. 

DESCRIPTION: DOD and extreme-condition commercial applications continually face diminishing manufacturing sources and material shortages for obsolete electronics. As the number of known ICs in the appropriate package goes to zero, the community has few options: new manufacturing of the existing IC (if the design is available and foundry has capability - usually neither is available), reverse engineer the IC function and either emulate the IC with a more current IC (rare, if possible), or fabricate a redesigned IC. Other options include board redesign and worst case, system redesign. Redesigns usually take over a year and can cost tens of millions dollars for each IC redesign. Recently another option has emerged if the needed IC is available but not in of required package. The process is called IC DER. An individual IC contains inside its protective packaging its electronics also called a die. Typically, the same die is used in many different packages that are specifically chosen for cost, operation, and environment. The DER process takes a die equivalent to the obsolete die from an undesirable package and reassembles that die into the needed package. The oil drilling industry's need for high-reliability, high temperature electronics drove early development of the DER process. The goal was to take parts in low-cost plastic packages, developed for systems with benign operating conditions and environments and repackage them for the drilling industry's extreme-use and extreme environments. The DOD has similar requirements. Rapid advancements are being made to optimize photonic integrated circuits (PIC) components that provide basic functionality to address limitations in conventional and mixed signal ICs. For example signal bottlenecks and excess power consumption associated with parasitic capacitive effects and EMI signal degradation for high-speed routing could be significantly reduced using photonic techniques. IC device performance limitations from signal routing associated with packaging of the individual die, and repackaging techniques such as IC DER could benefit from the implementation of PIC technology for high speed signal routing. Innovations are sought to develop tools and techniques to certify DER/optical hybrid circuits for use in ground, air and/or space applications. 

PHASE I: Define and document a manufacturing process for analog, digital, and mixed signal DER ICs and connecting them optically. Document an expected Return of Investment (ROI) with a goal of 3:1. Build/test a DER/optical hybrid circuit that uses at least one DER IC. Testing will include electrical, temperature and humidity, vibration, dynamic shock, yield, and reliability testing. 

PHASE II: Document an expected ROI. Replace analog, digital, and mixed signal ICs in a LRU with DER-optical hybrid ICs. Also replace other electronic components with optical components. Perform MIL-STD-883 testing (Groups A, B, C (4000 hour dynamic modified life test), D) on donor ICs and DER ICs to ensure minimal drifting of parametrics. Perform MIL-STD-883 on LRU. Demonstrate DER processes are sufficiently stable and controllable so as to ensure military-grade like parts can be consistently produced. 

PHASE III: Use Phase II process to replace components in a LRU with DER-optical hybrid ICs and passive optical components for use on an aircraft to resolve reliability/DMS issues. Document techniques developed under this effort to enable the DOD/commercial sector to easily leverage the benefits of this effort. 

REFERENCES: 

1: Environmental Requirements http://www.dla.mil - Military Standard (MIL-STD) 883J - Test Method Standard, Microcircuits - MIL-STD-750 - Test Methods for Semiconductor Devices - MIL-PRF-38510 - General Specification for Microcircuits - MIL-PR

2:  Patented DPEM Process for Die Removal DPA Components International (Simi Valley, CA) http://www.dpaci.com/patented-dpem-process-for-die-removal.html

KEYWORDS: Integrated Circuit, IC, Microcircuit, Die Extraction And Reassembly, Die Extraction And Repackaging, Manufacturing, Obsolescence, Diminishing Manufacturing Sources, Reliability, Optical, Communications 

CONTACT(S): 

Dale Stevens 

(937) 713-8868 

dale.stevens.2@us.af.mil 

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