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Radiation Hardened Electronics and Techniques

Description:

TECHNOLOGY AREA(S): Electronics 

OBJECTIVE: Develop radiation hardened electronic components capable of surviving and operating through exposure to radiation environments encountered in space. 

DESCRIPTION: Seek design and fabrication methods of electrical components and circuits based on hardened components. Hardened circuits/components should be able to survive and operate through space radiation environments with recommended total ionizing dose (TID) >300 krads (Si), single event upsets (SEU) < 10-10 errors/bit-day, and immunity to single event latch-up (SEL) at linear energy transfer (LET) levels > 100 MeV cm2/mg. Electronic components and systems exposed to radiation in space may experience power resets, safing (de-arming), performance degradation, and/or temporary or permanent failure due to cumulative effects of long-term exposure or high energetic particle and/or photon fluence. Radiation sources in space include particles geo-magnetically confined in radiation belts (protons, electrons, heavy ions); particles from solar winds, coronal mass ejections (proton rich) or flares (heavy ion rich); omnidirectional free space particles (galactic cosmic rays, heavy ions); or particles and photons from man-made events (X-rays, Gamma-rays, neutrons, radioactive debris) as well as electro-magnetic pulse (EMP). Typically, systems employ a combination of methods for radiation protection: shielding, part redundancy, circumvent and recovery (C&R), rad-hard by design (RHD), and hardened parts. Using shielding and redundant parts imposes mass penalties. C&R places a system in a protective mode until a radiation event passes limiting system functionality during the down time. RHD develops radiation tolerant circuits that minimize single point failures. The hardened parts approach involves design, fabrication, selection and screening of parts for radiation tolerance. New manufacturing techniques and recent developments in nano-materials create an opportunity for developing electronic components insensitive to radiation effects. In particular, vacuum field effect component technology (e.g. diodes, triodes, transistors) and combinations of components (e.g. operational amplifiers, simple logic devices) constructed using high density three dimensional (3D) fabrication techniques, are of interest as they could lead to analog electronics and digital integrated circuits with inherent operate through capability requiring minimal shielding and/or C&R. Another potential opportunity lies in memory development, e.g. resistive memories that store information using charge retention, making them less sensitive to SEU caused by high-energy particles. 

PHASE I: Design radiation insensitive component(s), simple circuit(s), and/or 3D fabrication technique(s). Provide analysis substantiating proposed component(s), simple circuit(s), and/or 3D fabrication technique(s) can survive and operate through realistic radiation environments. Fabricate simple proof of principle prototypes and establish baseline performance parameters. Conduct initial operational and evaluation testing of prototypes in realistic radiation environments. Characterize survivability and operability in realistic radiation environments and standard military specified range for thermal cycling. 

PHASE II: Optimize design(s) to improve baseline performance, increase survivability and level of operability in realistic radiation environments. Fabricate and test optimized parts in realistic radiation environments and against standard military temperature cycling specification. Work with a vendor/trusted foundry/fabrication house and/or military prime contractor on part(s) manufacturability/producibility. Incorporate hardened parts in a representative space avionic subsystem/system application and test in realistic space radiation environments. 

PHASE III: Team with a vendor/trusted foundry/fabrication house and/or military prime contractor to develop and space qualify radiation-hardened parts. Work with the transition partner to establish a pathway to insert technology into an existing or planned missile defense application. 

REFERENCES: 

1: G. C. Messenger and M. S. Ash. May 1992. The Effects of Radiation on Electronic Systems, Springer, 2nd Ed.

2:  R. H. Maurer, et.al. 2008. "Harsh Environments - Space Radiation Environment Effects and Mitigation." Johns Hopkins APL Technical Digest, Vol. 28: No. 1.

3:  H. Johnston, June 1998. "Radiation effects in advanced microelectronics technologies." IEEE Trans. on Nuclear Science, Vol. 45: No. 3: 1339-1354.

4:  Jin-Woo Han, Jae Sub Oh, and M. Meyyappa. May 2014. "Cofabrication of Vacuum Field Emission Transistor (VFET) and MOSFET." IEEE Trans. on Nanotechnology, Vol. 13: No. 3.

5:  Shimeng Yu and Pai-Yu Chen. April 2016. "Emerging Memory Technologies - Recent Trends and Prospects." IEEE Solid-State Circuits Magazine, 8(2): 43-56.

KEYWORDS: Radiation Hardened Microelectronics, Radiation Hardening, Space Electronics, Nuclear Weapon Effects, Operate Through, Nuclear Survivability, Fault Tolerant Computing, Single-Event Effects, Total Ionizing Dose, Linear Energy Transfer, Single-Event Latch-up, Single-Event Upset 

CONTACT(S): 

Jeff Keller 

(256) 450-2835 

jeff.keller@mda.mil 

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