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Scalable, Power Efficient, Programmable, Wide Dynamic Range, Multi-Field - Programmable-Array Compatible Readout Integrated Circuit for Infrared Range Applications

Description:

TECHNOLOGY AREA(S): Electronics 

OBJECTIVE: Current readout integrated circuits (ROICs) consume significant power and are custom-designed for a specific focal plane array (FPA) detector material (e.g. InGaAs). The goal is to reduce the cost of ROICs by designing and developing a general-purpose energy-efficient ROIC that works with a wide variety of FPAs, and provides wide dynamic range. 

DESCRIPTION: The purpose of the foreseen read out integrated circuit (ROIC) is to cover a wide range of DoD applications and offer an on-demand component replacement for standard ROICs in multiple defense platforms. Traditionally, ROIC designs are optimized for specific Focal Plane Array (FPA) detector materials such as, InGaAs, InSb, or HgCdTe; varying the detector material enables coverage of a wide range of wavelengths and sensitivities. A fully flexible ROIC design will offer a combination of digital programmable features, interchangeable fabrication mask-subsets, and different reticle exposure options to accommodate various photo detector materials in a scalable FPA. A variant of a mask-subset can be used to accommodate different pixel types or architectures enabling alternative set of pixel features. This is a new area of research. The ROIC’s ability to interconnect with different FPA materials will require circuit operation over a wide range of temperatures including the cryogenic range. This adaptable ROIC should introduce resolution, frame rate, and power consumption trade-offs to enable optimization for use in multiple defense application platforms. The ROIC design will permit operation over a wide input dynamic range but be configurable to focus the circuit’s dynamic range within a region of interest in the input signal. Power efficiency is critical for high throughput applications where resolution (1-2 Mpix - 16 Mpix) and frame rate per second (10 - 100 fps) are increased. The foreseen ROIC will include options to allow for the power consumption to be adjusted programmatically as determined by the specific application or imaging mode. Additionally, the ROIC should consider incorporation of front-end signal processing such as compressive sensing to enable manipulation of the data bandwidth in both the analog and digital domains to further enhance power efficiency. A competitive design will achieve the highest dynamic range at the lowest power consumption and read-noise levels. State-of-the-art CMOS COTS (Commercial-Off-The-Shelf) image sensors can achieve 3-5 nJ/pixel and 3 electrons RMS read-noise while standalone ROICs are currently consuming 50-100 nJ/pixel at 30-50 electrons RMS read-noise. The target ROIC design should ultimately close the gap between monolithic and hybridized sensors by operating at both low power consumption and read-noise levels (5-10 nJ/pixel and 10 electrons RMS), and allow variable frame rates (10 – 100 fps), and resolutions. 

PHASE I: Investigate design scope and define specifications; evaluate architecture choices and trade-off matrix for hardwired and programmable features; define pixel design options for different pixel pitches, for example: 10 um x 10 um versus 15 um x 15 um. Determine minimum and maximum attainable FPA resolution in a given process fabrication technology. Propose a practical solution that meets supports 2 – 16 Mpix, variable frame rate 10 – 100 fps, and exhibits low noise levels (< 20 nJ/pixel). 

PHASE II: Design, fabricate, and test a ROIC sub-array prototype containing critical blocks such as pixels, column readout, ADCs, and IO variants for validation; evaluate the performance of each architectural choice against a trade-off matrix; determine the architecture for a full ROIC design. A competitive design will achieve the highest dynamic range at the lowest power consumption and read-noise levels. State-of-the-art CMOS COTS (Commercial-Off-The-Shelf) image sensors can achieve 3-5 nJ/pixel and 3 electrons RMS read-noise while standalone ROICs are currently consuming 50-100 nJ/pixel at 30-50 electrons RMS read-noise. The target ROIC design should ultimately close the gap between monolithic and hybridized sensors by operating at both low power consumption and read-noise levels (5-10 nJ/pixel and 10 electrons RMS), and allow variable framerates (10 – 100 fps), and resolutions. The prototype should be delivered to the government at the end of the program. 

PHASE III: Fabricate a full ROIC design; construct a camera test bench and characterize and evaluate the full ROIC. Provide a clear technology transition path commercial as well as DoD applications. Demonstrate sufficient technology readiness level (TRL) for the newly designed ROIC. Commercial and military applications should be addressed and targeted. The commercialization pathway would be collaborating with government or commercial end users to develop and fabricate a full ROIC design; construct a camera test bench and characterize and evaluate the full system. Use of the developed innovative ROIC should be made in conjunction with focal plane array detector. Potential commercial applications include various high-speed focal plane read-out, and high performance signal processing. Military Applications include integrated C4ISR optical systems, and image signal processing. 

REFERENCES: 

1: S. Kavusi, and A. El Gamal, "A quantitative study of high dynamic range image sensor architectures," Proceedings of the SPIE Electronic Imaging, Vol. 5301, Jan. 2004.

2:  P. Martin, A.S. Royet, and F. Guellec, G. Ghibaudo, "MOSFET modeling for design of ultra-high performance infrared CMOS imagers working at cryogenic temperatures: Case of an analog/digital 0.18 lm CMOS process", Solid State Electronics Journal, Vol. 62, Issue 1, pp. 115–122, Aug. 2011.

3:  E. Candes and M Wakin, "An Introduction to Compressive Sensing," IEEE Signal Processing Magazine, vol. 25, no. 2, 2008, pp. 21–30.

KEYWORDS: ROIC Readout Integrated Circuit FPA Focal Plane Array 

CONTACT(S): 

Ali Darwish 

(301) 394-2532 

ali.m.darwish.civ@mail.mil 

Dr. Alfred Hung 

(301) 394-2997 

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