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Power Electronics Thermal Interfaces (PETI)



OBJECTIVE: The objective is to provide new interface materials and processes for device die attachment and electronics packaging with increased temperature range, mechanical strength and thermal conductivity. 

DESCRIPTION: Thermal issues are a major factor in many of the Air Force electronic applications. Many of our state of the art electronics are pushing the envelope of power densities. Thermal cycling of electronics between multiple operating and cold off environments results in 100’s of C changes contributing to thermal issues. Many of these issues occur at heterogeneous interfaces with high thermal interface resistance and mechanical failure often through mismatch in coefficient of thermal expansion (CTE) causing stress to rise at the interface. This includes power electronics whether it be for power conditioning and distribution, radio frequency (RF) power amplification or high power optical/laser devices. Many of the power electronics are epitaxial grown on dissimilar substrates (e.g. GaN on SiC or Si) while SiC devices utilize direct bonded copper. Diode lasers and quantum cascade lasers are bump bonded with solder to heat spreading substrates. All of these interfaces can benefit from new materials and processes to bridge these interfaces to provide immunity to CTE while maintaining low thermal resistance. Approaches being tried include nanotube thermal interface materials, graphene, epitaxial CTE transitioning stacks of thin films, direct diamond growth, for example. This SBIR will investigate approaches to achieve these interface improvements by developing high temperature solders that maintain high thermal transport and also have the mechanical strength to withstand typical CTE mismatches between semiconductors and oxides (3 – 6 ppm) and typical metals used (15 – 30 ppm). Recent alloys investigated for high temperature solders exhibit undesirable characteristics such intermetallic compounds, toxicity and poor workability (Zeng, et al). Finding alternative alloys with improvement on these undesirable characteristics is beneficial. Additionally, significant suppression of melting temperatures for nanoparticles less than 20 nanometers with respect to the bulk values has been demonstrated providing alternative solders that can attach dies with low melting temperature but then form large scale films with the bulk melting point for high temperature electronics. For comparison of alternative approaches, testing and demonstration will emphasize direct bonded copper aluminum nitride substrates and attach silicon carbide, gallium nitride dies (or just blank SiC and GaN substrates). Current solders have thermal conductivities between 20 and 70 W/(m-K). Thermal conductivity performance target for Phase I is greater than 30 W/(m-K) and the target for Phase II is greater than 50 W/(m-K). However, greater than 70 W/(m-K) is strongly desirable. The target mechanical performance demonstration goals are, Phase I: -20C to 250C with 500 cycles without delamination; and Phase II: -30C to 300C with 1000 cycles without delamination. 

PHASE I: Laboratory demonstration of proposed materials and processes to increase the temperature and mechanical properties at interfaces between devices, substrates and heat spreaders. Similar fit and form materials for devices, substrates and heat spreaders can be used as stand-ins and not necessary to demonstrate working electrical modules. Scope is proof of concept and testing to show approach is able to achieve threshold requirements. 

PHASE II: Breadboard demonstration of proposed materials and processes to increase the temperature and mechanical properties at interfaces between devices, substrates and heat spreaders. Breadboard in this sense means that working power electronics components (dies, discrete components, modules, etc.) will be utilized to demonstrate a working module/system in a relevant environment. Environment can be implemented in a chamber, oven, etc. Scope is breadboard level, testing to show approach is able to achieve objective requirements. 

PHASE III: DUAL USE COMMERCIALIZATION: Military Application: Many military space systems need high temperature solders at interfaces for power conditioning, load balancing, as well as high power RF for applications such as RADAR. Improving the thermal transport, temperature range and thermal cycling survivability will enable missions currently limited by a “thermal budget”. Commercial Application: Power modules, power supply, and power conditioning systems based on silicon have a foot print determined by the cooling system rather than the silicon power electronic which can be 10 to 100 times smaller than the cooling footprint. Wide band gap semiconductors permit running the electronics at higher temperatures, reducing the cooling requirements, and the footprint by up to an order of magnitude. 


1: Merrett, J. Neil, Richmond, James

2:  Agarwal, Anant

3:  Leslie, Scott, International Conference and Exhibition on High Temperature Electronics 2010, HiTEC 2010, pp. 289-296, 2010.

4:  Suganuma, K., Kim, S., IEEE Electron device Letters, Vol. 31, No. 22, pp. 1467-1469, 2010.

5:  Tabatabaei , Salomeh, Kumar , Ashavani, Ardebili , Haleh, Loos , Peter J., Ajayan , Pulickel M., Microelectronics Reliability Vol. 52, pp. 2685–2689, 2012.

KEYWORDS: Solder, Interfaces, Nanoparticle, Wide-bandgap, WBG, Ultrawide-bandgap, UWBG, Thermal-cycling 


Dr. John B. Ferguson 

(937) 255-9029 

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