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Energy Efficient, Non-Silicon Digital Signal Processing (DSP)

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N68335-18-C-0654
Agency Tracking Number: N17A-027-0154
Amount: $1,999,985.00
Phase: Phase II
Program: STTR
Solicitation Topic Code: N17A-T027
Solicitation Number: 17.A
Timeline
Solicitation Year: 2017
Award Year: 2018
Award Start Date (Proposal Award Date): 2018-08-01
Award End Date (Contract End Date): 2022-06-29
Small Business Information
175 Clearbrook Road
Elmsford, NY 10523
United States
DUNS: 103734869
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Deepnarayan Gupta
 President
 (914) 592-1190
 gupta@hypres.com
Business Contact
 Phil Puma
Phone: (914) 592-1190
Email: proposal@hypres.com
Research Institution
 Columbia University
 Philip Puma Philip Puma
 
538 West 128th Street
New York, NY 10027
United States

 (914) 592-1190
 Nonprofit College or University
Abstract

Superconductor digital circuits, operating at very high clock speed, can directly process wideband digitized radio frequency (RF) signals. By integrating such digital processing circuitry together with superconductor analog-to-digital converters (ADCs), we propose to develop the next generation digital-RF receivers. Leveraging the recent development of multiple superconductor ADCs on the same chip and supported by fast digital data links to room-temperature processors, we propose new digital circuitry enabling digital true-time-delay beamforming. In Phase I, designed digital signal processing (DSP) circuitry, combined with multiple ADCs on a new integrated circuit (IC), and released it for fabrication. In Phase II, we intend to expand on this to develop the most complex single flux quantum (SFQ) digital circuitry ever demonstrated on a single superconductor integrated circuit. Optional extensions to multi-chip modules are proposed.

* Information listed above is at the time of submission. *

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