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Electrochemical Micro-Capacitors Utilizing Carbon Nanostructures

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA9302-17-C-0001
Agency Tracking Number: E13B-001-0040
Amount: $745,242.00
Phase: Phase II
Program: STTR
Solicitation Topic Code: DMEA13B-001
Solicitation Number: 13.B
Solicitation Year: 2013
Award Year: 2017
Award Start Date (Proposal Award Date): 2017-03-05
Award End Date (Contract End Date): 2019-12-30
Small Business Information
200 Yellow Place Pines Industrial Center
Rockledge, FL 32955
United States
DUNS: 175302579
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Justin Hill
 Senior Engineer
 (321) 631-3550
Business Contact
 Dr. Robert P. Scaringe
Phone: (321) 631-3550
Research Institution
 University of Florida
 Kirk Ziegler Kirk Ziegler
P.O. Box 116005
Gainesville, FL 32611
United States

 (352) 392-3412
 Nonprofit College or University

The rapid advancement of microelectronics requires equivalently sized energy storage devices to provide energy for microelectromechanical system (MEMS) devices and other technologies. By using a novel approach to fabricate carbon nanotubes (CNTs), our electrodes have a high surface area with an aerial tube density up to 1,000 times greater than typical carpet-grown CNTs. By combining these electrodes with designer electrolytes, we have demonstrated ultracapacitors significantly better than the state-of-the-art micro-capacitors under development. The performance actually improves with increasing current withdraw that causes internal heating and would otherwise destroy traditional ultracapacitors. During Phase I, Mainstream determined the optimal electrode–electrolyte system to obtain high energy density micro-capacitors and demonstrated their performance at various temperatures. In addition, we demonstrated fabrication of our electrodes on a silicon chip, and used photolithography to successfully fabricate the chips in an interdigitated electrode design. Our work plan for the Phase II is designed to further improve our ultracapacitor design through modeling and experimental work. By the end of Phase II, we will produce an independently verifiable full-scale prototype on-chip device.

* Information listed above is at the time of submission. *

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