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A Multi-channel Radiation-tolerant, Low-power, High-speed, and Resolution Analog-to-Digital Converter for Nuclear Physics Detectors

Award Information
Agency: Department of Energy
Branch: N/A
Contract: DE-SC0018442
Agency Tracking Number: 243785
Amount: $1,000,000.00
Phase: Phase II
Program: STTR
Solicitation Topic Code: 28b
Solicitation Number: DE-FOA-0001975
Timeline
Solicitation Year: 2019
Award Year: 2019
Award Start Date (Proposal Award Date): 2019-05-28
Award End Date (Contract End Date): 2021-05-27
Small Business Information
6302 Ben Road
Sachse, TX 75048-4804
United States
DUNS: 033357192
HUBZone Owned: Yes
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 PIng Gui
 (214) 768-1733
 pgui@lyle.smu.edu
Business Contact
 Anton Quiroz
Phone: (214) 554-2752
Email: anton@apogeesemi.com
Research Institution
 Southern Methodist University
 Ping Gui
 
3200 Binkley Avenue
Dallas, TX 75205-6317
United States

 (214) 768-1733
 Nonprofit College or University
Abstract

Cost-effective and power-efficient radiation tolerant semiconductors are needed in various harsh environments, such as particle detectors, communication satellites, high-altitude avionics and medical imagining equipment. These include amplifiers, voltage regulators, analog-to-digital converters (ADCs) and digital logic circuitry. However, radiation-tolerant high-speed ADCs currently cost more than $30,000 per channel and have high power consumption. A novel multi-channel, high-speed radiation tolerant ADC is proposed, leveraging Apogee Semiconductor’s patented rad-hard-by-design technology, offering significantly lower power consumption and smaller size than what is offered by the current state of the art. This will result in an order of magnitude lower cost per channel, and will allow for greater integration of multiple ADCs into a single integrated circuit (IC). During the course of the Phase I, we have conducted an extensive study, analyses, circuit design, simulations, chip fabrication and on-silicon measurements to demonstrate the feasibility of the approaches and techniques proposed in the Phase-I proposal. All the tasks outlined for Phase I have been successfully completed. During Phase II, a radiation-tolerant 16-channel, 1 Gigabit-per-second 12-bit ADC will be designed and fabricated using a state-of-the-art 28nm CMOS silicon fabrication process. The resulting silicon will be radiation-tested to ensure compliance with nuclear physics applications, thereby also validating its tolerance to the lower radiation levels experienced in aerospace and medical imaging environments. Commercial applications and other benefits: The outcome of the Phase II project will be a low-cost integrated solution that will not only address the DoE needs, but will also enable large constellations of small communication satellites to provide low- latency and high-speed, cost-effective internet access to underserved populations. It will also provide a cost-effective solution for medical imaging equipment that will allow wider public access to it, as well as reduced exposure of patients to harmful x-ray radiation.

* Information listed above is at the time of submission. *

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