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Small Satellite Components for Space Applications

Description:

TECHNOLOGY AREA(S): Space Platforms 

OBJECTIVE: To develop small satellite technology components and subsystems for use in Low Earth Orbit (LEO). 

DESCRIPTION: The appeal of small satellites as a low-cost, rapid-development approach to achieving a new on-orbit capability has gained momentum over the last several years. Future Army applications require constellations of multiple small satellites with various payloads and capabilities. The goal of this SBIR is to develop new and innovative components, subsystems, and systems for next generation small satellites. The challenge is to develop components that can be packaged in a small satellite (12U or smaller) and operate in the harsh environment of space for extended lifecycles without sacrificing performance. The specific technical challenges to be addressed include: • Low power, high data throughput Field Programmable Gate Array (FPGA) flight computers • Low power digital camera systems • Non-volatile solid state memory • Guidance, Navigation, and Control systems, subsystems, and components • Software Defined Radio • Other Communications Components (i.e., antennas, amplifiers, optical, other) While these components and experiments may be at low technology readiness levels (TRL) in Phase I it is expected that a pathway to TRL maturation will be achieved through Phase II with potential flight experiments in Phase III. A goal of this SBIR is to develop components and/or subsystems and systems that will enable a demonstration of the technical challenge(s) addressed by the proposed in a spaceflight experiment. 

PHASE I: The phase I effort will result in analysis and design of the proposed components and experiments. The phase I effort shall include a final report with modeling, simulation, and/or experimental results supporting performance claims. The method for performing the technical challenges will be documented. 

PHASE II: The Phase I designs will be utilized to fabricate, test and evaluate a breadboard system. The designs will then be modified as necessary to produce a final prototype for flight qualification testing. Flight qualification testing can be proposed as a Phase II option. The final prototypes will be demonstrated to highlight the specific capabilities and performance in meeting the technical challenges. A complete demonstration system (of the breadboard and/or prototype system(s)) must also be provided by the offeror. At the end of the Phase II flight qualification option it is expected that the prototype will be at TRL 6. 

PHASE III: Civil, commercial and military applications include small satellite constellations. The Phase III effort would be to design and build a flight experiment payload to demonstrate the particular proposed performance characteristics on an orbiting platform (i.e., small satellite, ISS platform, other). Military funding for this Phase III effort would be executed by the US Army Space and Missile Defense Technical Center as part of its Quantum Entanglement and Space Technology research. 

REFERENCES: 

1: "Small Spacecraft Technology State of the Art," NASA Mission Design Division – Ames Research Center, Moffett Field, CA, Tech Rep NASA/TP-2015-216648/REV1, December 2015.

KEYWORDS: Small Satellite, Low Power, High Data Throughput Field Programmable Gate Array (FPGA) Flight Computers, Low Power Digital Camera Systems, Non-volatile Solid State Memory, Guidance, Navigation, And Control Systems, Subsystems, And Components, Software Defined Radio, Other Communications Components (ie, Antennas, Amplifiers, Optical, Other) 

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