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Non Real-Time Hardware Assisted Computer System Simulation


TECHNOLOGY AREA(S): Information Systems


Resolve restrictions of the Linux Kernel Virtual Machine (KVM) to enable control of the time stamp counter to keep software execution rate consistent with non real-time simulation time.


This topic seeks to develop an accurate timing source for software execution on a KVM to enable non real-time simulations. The Linux KVM supports the use of physical computer cores to accelerate the execution of virtual machines. In this paradigm, peripheral hardware is simulated in a user space (ie. non-privileged space) process (ie. the allocation of memory and time) while streams of machine instructions to be executed by the virtual cores are supplied to the KVM module of the operating system, which executes those streams on real hardware. Timing accuracy is not as much of a concern as control of the time stamp counter for non real-time simulation time control instead of its intended virtualization use. Several aspects of this virtualization method prove challenging when the streams of machine instructions are intended to be executed as part of a simulation model rather than a virtualization tool. Among the most challenging are (1) determining how the KVM populates the time stamp counter register of the virtual core, and (2) accounting for the number of instructions to be executed by the KVM between returns to user space which cannot be controlled directly by the user space process. This impedes the use of the time stamp counter as a timing source because it cannot be matched to a non real-time simulation and it prevents the presentation of a consistent rate of execution to the software hosted on the virtual machine for use in non real-time simulations.


Develop the proposed approach to a sufficient level to demonstrate its viability and identify requirements for full development. The following are anticipated at the conclusion of Phase I: a) A demonstration/proof-of-concept of the viability of the proposed approach. b) An algorithmic/process description of the developed approach, to include use-case descriptions and descriptions or demonstrations of output. c) A plan for the development of an initial working prototype capability, to include cyber security efforts to gain approval to operate on government computers.


Deliver an initial working prototype capability. The following are anticipated by the conclusion of Phase II: a) A demonstration of initial capability. b) Prototype software for experimental trials by government users. c) Documentation, including software scan results, to support approval decisions to load software onto government computer systems. d) Documentation of the initial capability sufficient to support trial use. e) Documentation of the software architecture, its algorithms/processes, and output formats. f) A plan for development of a full operational capability.


Deliver phased incremental improvements to the prototype until a full operational capability is achieved. At each increment, the following are anticipated: a) Demonstrations of incremental additions/improvements. b) A software release for use/testing by the government. c) Documentation, including software scan results, to support approval decisions to load software onto government computer systems. d) Updated user documents. e) Updated architecture, algorithms/processes, and output format documentation. At the conclusion of Phase III, the final software and documentation should be delivered.

KEYWORDS: Simulation Time Management, KVM, non real-time, emulation


1. Zachary Amsden. Timekeeping Virtualization for X86-Based Architectures. Accessed 14 April 2020:

2. T. Yeh and M. Chiang, "On the interface between QEMU and SystemC for hardware modeling," 2010 International Symposium on Next Generation Electronics, Kaohsiung, 2010, pp. 73-76.

3. Ozmen, Ozgur, Nutaro, James J., Sanyal, Jibonananda, and Olama, Mohammed M. Simulation-based Testing of Control Software. United States: N. p., 2017. Web. doi:10.2172/1343541.

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