You are here

SBIR Phase I: Pseudolithic Integration of Heterogeneous Device Technologies

Award Information
Agency: National Science Foundation
Branch: N/A
Contract: 2110446
Agency Tracking Number: 2110446
Amount: $255,999.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: S
Solicitation Number: N/A
Timeline
Solicitation Year: 2020
Award Year: 2021
Award Start Date (Proposal Award Date): 2021-08-01
Award End Date (Contract End Date): 2022-04-30
Small Business Information
1114 CORTO CAMINO ONTARE
SANTA BARBARA, CA 93105
United States
DUNS: 117158465
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Daniel Green
 (704) 578-2545
 dan@pseudolithic.com
Business Contact
 Daniel Green
Phone: (704) 578-2545
Email: dan@pseudolithic.com
Research Institution
N/A
Abstract

The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase I project is to develop a new semiconductor manufacturing process to work "beyond Moore's law". The broader impact and commercial potential of the proposed activity is to reduce the barrier to manufacture highly integrated components for 5G and future wireless technologies, including base stations and satellite communication. This will enable new devices that produce higher power and operate with better energy efficiency than current solutions. This Small Business Innovation Research (SBIR) Phase I project will commercialize a heterogeneous integration process to combine electronic solutions greater than the capabilities of their constituent parts. Incumbent silicon processes cannot produce transistors capable of the power handling of III-V technologies such as Gallium Nitride (GaN). However, III-V technologies, such as GaN, are niche devices for specialized market needs. When products require both silicon and compound semiconductor components, chips are arranged in multi-chip modules with large parasitics and interconnects that prohibit high-frequency (RF and millimeter) applications. Affordable heterogeneous integration of diverse material systems on a common substrate remains an elusive capability in modern processes. The research objectives of this project are to demonstrate heterogeneous integration of III-V devices on a silicon substrate for a millimeter-wave product. The research will investigate the large-scale manufacturing limitations of transistor integration. The project would design, fabricate and test RF passive components and matching networks in silicon interposers to be used in conjunction with III-V transistors. These approaches will be demonstrated on a 28 GHz power amplifier product for emerging 5G radio applications. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

* Information listed above is at the time of submission. *

US Flag An Official Website of the United States Government