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Scalable Neuromorphic Energy-Efficient Accelerator for Heterogeneous Processor Architectures

Award Information
Agency: National Aeronautics and Space Administration
Branch: N/A
Contract: 80NSSC22PB113
Agency Tracking Number: 222264
Amount: $149,941.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: H6
Solicitation Number: SBIR_22_P1
Solicitation Year: 2022
Award Year: 2022
Award Start Date (Proposal Award Date): 2022-07-21
Award End Date (Contract End Date): 2023-01-25
Small Business Information
444 East 2nd Street, Suite 250
Dayton, OH 45402-1724
United States
DUNS: 117984847
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Georgios Dimou
 (858) 336-1920
Business Contact
 Jason Graalum
Phone: (971) 277-0109
Research Institution

Under this effort, Niobium Microsystems, Inc. is proposing a low power computing architecture accelerator for neuromorphic processing which can enable real-time sensor data processing and autonomous decision making that is cost-effective and scalable to the growing data ingestion and processing needs of future autonomous systems. The proposed architecture will be highly scalable and compatible with modern processor systems (such as RISC-V or ARM), so that it can be easily adopted in a variety of new systems, and also easily integrated into existing systems. Additionally, Niobium proposes to integrate the proposed accelerator into a larger SoC that will serve as a proving ground and reference design for the accelerator concept. The SoC will be capable of acting as a primary processor in systems or as a co-processor to existing systems. Ultimately Niobium intended to utilize this accelerator as a standard block in its family of heterogeneous processor architectures.Niobium proposes the following four technical objectives for Phase I:(1) Study prior efforts and capture the performance and efficiency metrics as well as the limitations of existing platforms;(2) Propose a novel architecture for a neuromorphic accelerator compatible with heterogeneous processor platforms (RISC-V- or ARM-based);(3) Explore available MRAM technology (GlobalFoundries 22FDX), characterize its PPA and propose ways for incorporating into the architecture; and(4) Estimate performance, power and efficiency metrics for comparison to existing solutions.

* Information listed above is at the time of submission. *

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