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Ultra-High Voltage Reliability Test System

Description:

OUSD (R&E) CRITICAL TECHNOLOGY AREA(S): Microelectronics

 

The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws.

 

OBJECTIVE: Develop an ultra-high voltage package-level reliability test system to conduct High Temperature Gate Bias (HTGB), High Temperature Reverse Bias (HTRB), High Humidity High Temperature Reverse Bias (H3TRB), and Accelerated Life Test High Temperature Reverse Bias (ALT-HTRB) testing for wide bandgap semiconductor devices. The package-level reliability test system shall be suitable for wide bandgap devices possessing a blocking voltage up to 40kV, including metal-oxide-semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors, (IGBTs), thyristors, and diodes.

 

DESCRIPTION: The growing popularity of high voltage, high power electronics in the commercial and defense industry is driving the need to perform reliability and qualification testing at ultra-high voltage and power levels. While many standards exist (i.e., JEDEC, IEC, MIL-STD, etc.) [2, 3], package-level reliability test systems capable of meeting the environmental and power requirements are commercially unavailable [4, 5].

 

For discrete wide bandgap devices, HTGB, HTRB, H3TRB, and ALT-HTRB are some of the primary reliability tests industry has adopted for qualifying device robustness. These tests require a temperature-humidity test chamber capable of maintaining a specified temperature and relative humidity continuously, while providing electrical connections to the devices under test in a specified biasing configuration. The chamber must be capable of providing controlled conditions of temperature and relative humidity during ramp-up to, and ramp-down from, the specified test conditions [2, 3].

 

Currently, a package-level reliability test system capable of conducting HTGB, HTRB, H3TRB, and ALT-HTRB up to 40kV is not commercially available. Laboratories conducting these tests at high voltage levels must piece together measurement hardware and develop custom control software, leading to an increase in development costs and time [1].

 

The proposed package-level reliability test system seeks to integrate the required power supplies, measurement hardware, and control software into one cohesive system. To facilitate high volume testing, the proposed test system shall be capable of testing 80 devices simultaneously. The proposed package-level reliability test system shall be suitable for wide bandgap devices possessing a blocking voltage up to 40kV and gate threshold voltage (when applicable) of ±50V. The test system shall provide temperature control from 25C to 200C, and relative humidity control from 15% to 85%. The test system shall be capable of providing electrical connections to the devices under test for various high voltage packaging schemes.

 

PHASE I: Perform a feasibility study on the package-level reliability test system architecture as it relates to the requirements outlined in the preceding section of this document. The end product of Phase I is a feasibility study report, which demonstrates the proposed techniques for achieving the test system requirements and justification for utilizing the proposed techniques. The report will explicitly address the following items:

  1. Voltage Requirement: The feasibility study shall describe the proposed technique for achieving a target voltage rating of 40kV.
  2. Temperature Requirement: The feasibility study shall describe the proposed technique for achieving a temperature-controlled environment of 25C to 200C.
  3. Humidity Requirement: The feasibility study shall describe the proposed technique for achieving a humidity-controlled environment of 15% to 85%.
  4. Package Adaptability: The feasibility study shall describe the proposed technique for adapting various high voltage packaging schemes into the test environment.
  5. Control Software Requirement: The feasibility study shall describe the proposed technique for implementing the control software. The control software shall include programmable settings such as applied reverse voltage, gate voltage, stress time, current compliance, voltage compliance, and measurement readout options (e.g., threshold voltage Vth and leakage current).
  6. Modular Design Requirement: The feasibility study shall describe the proposed technique for enabling a modular design, where components are swappable for replacement as equipment wears out.
  7. Safety Requirements: The feasibility study shall describe the proposed technique for integrating high voltage interlock features and ensuring operator safety.

Respondents shall deliver a report that satisfies all of the requirements outlined in Phase I. If any of the above items cannot be fully addressed in the Phase I feasibility report, the report must include relevant research and justification for their inapplicability.

 

PHASE II: Phase II will result in the delivery of a fully functional prototype developed in Phase I. The prototype shall undergo rigorous testing to ensure its functionality and safety. This includes various experiments to evaluate its performance under different temperature and humidity conditions.

The complete test system architecture shall be documented into a final report. The final report must contain sufficient technical details on the system architecture, including circuit diagrams, schematics, bill of materials, and specifications. In addition, the final report must include details on the control software, its implementation, and a user guide. Finally, the final report must include details on the mitigated challenges that occurred during the development of the test system. Once completed, the fully functional prototype shall be delivered to DMEA for evaluation of the completed test system.

In addition to the fully functional prototype, a technical manual for operator-level maintenance and support shall constitute a deliverable. The technical manual shall include details for performing routine maintenance and debugging common issues.

 

PHASE III DUAL USE APPLICATIONS: : Phase III will conclude with the delivery of a fully developed and verified pre-production Ultra-High Voltage Reliability Test System capable of meeting all the performance specifications described in the preceding sections of this document. During the Phase III program, offerors may refine the performance of the test system. A pre-production unit with any and all refinements must be provided for evaluation.

 

During the Phase III program, offerors shall seek the appropriate regulatory certification to ensure product safety requirements are met. Offerors shall consider UL/IEC regulation at this stage for future commercialization. UL/IEC regulatory certification ensures that the test system meets the necessary safety standards and guidelines, which is vital for successful commercialization.

 

REFERENCES:

  1. D. Berning, A. Hefner, J. M. Ortiz-rodriguez, C. Hood and A. Rivera, "Generalized Test Bed for High-Voltage, High-Power SiC Device Characterization," Conference Record of the 2006 IEEE Industry Applications Conference Forty-First IAS Annual Meeting, Tampa, FL, USA, 2006, pp. 338-345, doi: 10.1109/IAS.2006.256543.
  2. JEDEC, “Steady-State Temperature-Humidity Bias Life Test”, JESD22-A101D.01, JEDEC Solid State Technology Association, 2022, https://www.jedec.org/standards-documents
  3. JEDEC, “Temperature, Bias, and Operating Life”, JESD22-A108G, JEDEC Solid State Technology Association, 2021, https://www.jedec.org/standards-documents
  4. https://accelrf.com/solutions/htrb-multi-channel-test-system/
  5. https://qualitau.com/category/special-applications/high-voltage-htrb-h3trb/

 

KEYWORDS: Silicon Carbide; SiC; HTRB; HTGB; Ultra-High Voltage; UHV; Package Test System; Reliability

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