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Portable Optimizing Assembler for SIMD Instruction Sets
Title: Senior Researcher
Phone: (617) 864-1711
Email: athena@vanu.com
Title: Chief Operating Officer
Phone: (617) 864-1711
Email: abeard@vanu.com
"This SBIR Phase I project will develop a compiler for a portablevector assembly language. This tool will allow portable low-levelprograms to be written for signal-processing applications, and willproduce efficient code for modern general-purpose processors (GPP),taking full advantage of their vector (SIMD) instruction sets such asSSE on the Intel Pentium and Altivec on the Motorola PowerPC. Thistool will reduce the software development time and cost, and reducethe hardware parts cost, for a variety of BMDO and commercial signalprocessing systems.GPPs with SIMD offer superior price/performance and MIPS/Watt/Volumecompared to any other COTS processors, but currently, programs thatexploit SIMD instructions must be explicitly targeted to a singleprocessor and are not portable.By restricting the problem domain to signal-processing algorithms, andby restricting the portable source language carefully, we expect thecompiler developed in this project to output code competitive withhand-written SIMD assembly code. The large software engineeringimprovements that come from eliminating hand-written assembly code,and the reduction in hardware costs due to running efficient code onGPPs, give this compiler significant commercial potential for use bydevelopers of radio communications systems, medical devices, audiosystems, and other signal processing applications. BMDO applications that could potentially benefit from this compilerinclude signal pro
* Information listed above is at the time of submission. *