Description:
Lead Center:GSFC
Participating Center(s):JPL,MSFC
Ambitious science goals along with budgetary constraints are driving the need to increase the science return from smaller mission classes. This has led to new interest in cubesats and smallsats as viable science platforms. To enable capable science with these smaller missions, there is a critical need to miniaturize instruments, as well as spacecraft subsystems. To this end, this subtopic solicits the development of a radiation hardened structured-ASIC platform to implement flexible instrument processing nodes. This technology would enable integration of all digital functions of an instrument onto a single device, and would also enable similar integration of spacecraft bus digital functions for a cubesat or a smallsat. As flexible instrument processing nodes would reduce board-level assemblies into individual integrated circuits, the overall size/mass/power savings provided to a mission would be dramatic. A sampling of candidate mission applications for this technology includes: Miniaturized planetary instruments such as magnetometers and imagers. Highly capable heliophysics cubesats along with miniaturized instruments to measure field and particles. Earth observing smallsats and miniaturized instruments. Low power channel readout electronics for astrophysics mission concepts require data acquisition and processing for hundreds or even thousands of individual channels. If broadly applied, the flexible instrument processing nodes may enable currently roadmapped science observations to be implemented in smaller mission classes than are currently planned. To effectively support this broad array of applications, it is imperative that flexible instrument processing nodes be implemented such that customization for specific instruments and missions is both rapid and economical. Historically, the high cost and long development schedule of spaceflight ASICs has largely precluded them from use for mission specific applications. However, the emergence of radiation hardened structured-ASICs has the potential to change this paradigm, and as such, this is the specified platform for the flexible instrument processing node. This processing node will require an aggressive adoption of System-On-a-Chip (SOC) technology, which will provide substantially more resources than are presently available. Target specifications for the platform are; embedded 32-bit processor, 50,000 logic cells, 4Mbit of embedded RAM, 500kbit embedded ROM, and 400 user I/O. While dependent on the user design, maximum clock rates of at least 200MHz and maximum power dissipation of less than 500mW are desirable. As previously stated, it is desired that the node be implemented as a high capacity radiation hardened structured-ASIC platform that can enable highly integrated, instrument specific device implementations, while offering up to a 10x reduction in development cost and schedule as compared to full custom ASICs. Environmental specifications are; radiation hard to at least 1 Mrad TID, latch up Immune to an LET of at least 80, and a device SEE rate of not greater than 0.01 event/day in Adams 90% worst case GEO environment. For descriptions of radiation effects in electronics, the proposer may visit (http://radhome.gsfc.nasa.gov/radhome/background.htm). Proposals should clearly describe: The top-level device architecture. Individual circuit elements. The routing scheme. Methodologies for radiation hardening. Overall device capacity. Expected performance and power dissipation. Fabrication process and mask programming steps. Software tool flow for user designs. Successful proposal concepts should significantly advance the state-of-the-art. If a Phase II proposal is awarded, the combined Phase I and Phase II developments should produce prototype devices that can be evaluated by NASA. It should be noted that NASA can sponsor fabrication via the Trusted Access Program Office (TAPO) for this effort.
