High Resolution Three-Dimensional Digital Reconstruction of Integrated Circuits

Facile reverse engineering of existing devices by means of 3D reconstruction is an emergent need for advanced semiconductor technologists who seek to understand product failures, to improve device design and manufacturability, and to verify as-built device compliance to specified designs. The latter objective relates particularly to trusted and counterfeit device programs. Today's barriers to practical 3D reconstruction include throughput, reliability, fidelity and data volume. Our Phase I proposal will: a) Determine best methods to be utilized for development of a tool for 3D digital reconstruction of integrated circuits that meets DMEA constraints for this SBIR topic. b) Prepare a development plan for a proof-of-concept tool including performance specifications, budget and Gantt chart. c) Include a commercialization roadmap for this tool, and d) Deliver these items as a report to the DMEA at the end of Phase I.