High Speed Electronic Device Simulator

ABSTRACT: This project will develop and demonstrate a software package based on coupled Fokker-Planck (FP) - Fermi Kinetic Transport (FKT) models and full-wave Maxwell electromagnetic (EM) solver to accurately predict semiconductor device behavior from dc up through the mm-wave and THz frequency ranges. The FP model provides accurate non-equilibrium occupation functions for hot electrons with realistic electronic band structures and electron scattering mechanisms. It is numerically efficient compared to stochastic Monte Carlo models, is asymptotically reduced to FKT for Fermi occupation functions, and accommodates different time scales for energy and momentum transfer between mobile carriers and lattice. Both Delaunay-Voronoi surface integration (DVSI) and Discontinuous Galerkin Time Domain (DGTD) methods will be evaluated in Phase I to discretize Maxwells equations for complex geometries. The EM solvers will be compared in terms of parallel efficiency, high-order accuracy for spatial and temporal discretization, and ability to couple EM with charge kinetics. In Phase I, a simulation framework will be developed to produce device geometry, generate a Delaunay mesh, and demonstrate feasibility of self-consistent solution of high frequency field and charge dynamics for a representative device. Phase II will be devoted to the full implementation of the proposed simulator on modern computing systems and demonstration of its capabilities.; BENEFIT: Wireless communications, radar, imaging, spectroscopy, and chem/bio detection require electronic components operating in the mm-wave and THz frequency ranges. While GaAs metal semiconductor field effect transistor (MESFET) and nanoscale CMOS technologies have demonstrated high-frequency capabilities, these applications will likely require additional material systems and device architectures such as InP HBTs, GaN HEMTs, or possibly gated graphene structures. The developed tool with predictive, physics-based simulation capabilities will reduce cost of exploring this wide design space for future devices.