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Ultra Low Latency Burst-Mode Digital Imaging System

Award Information
Agency: Department of Defense
Branch: Special Operations Command
Contract: H92222-15-P-0040
Agency Tracking Number: S151-003-0086
Amount: $149,424.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: SOCOM15-003
Solicitation Number: 2015.1
Timeline
Solicitation Year: 2015
Award Year: 2015
Award Start Date (Proposal Award Date): 2015-08-19
Award End Date (Contract End Date): 2016-02-18
Small Business Information
2 Commercial Blvd., STE 201
Novato, CA 94949
United States
DUNS: 11164714
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: Yes
Principal Investigator
 Michael Jin
 Chief Technical Officer
 (617) 694-5182
 mjin@siliconmicrodisplay.com
Business Contact
 Paul Jin
Title: USSOCOM SBIR Program Manager
Phone: (617) 564-1975
Email: pjin@siliconmicrodisplay.com
Research Institution
N/A
Abstract

A burst-mode optical sensor to display architecture that allows for dynamic control over the system latency is proposed. The overall system latency of current digital imaging systems are determined and limited by the utilized video interconnection standards and the frame rates of optical sensor, image processor, and displays. In order to reduce the global system latency, an overhaul of image extraction, image processing, and display drive system needs to be considered. Here we propose to investigate what would be required to implement innovative imaging system architecture options that would match the sensor data extraction method with display drive method so that the two components can constitute a directly pipelined imaging sensor-display system with variable control over the latency as required by the amount of image processing needed. The proposed architecture promises sub-millisecond global latency at high-definition resolution when no image processing is needed to a few milliseconds even when full frame image processing is needed. Phase I effort will identify and verify the commercial imaging sensor, image processing architecture, and display components that are conducive to the implementation of the proposed architectural options for the construction of demonstration prototype in Phase II.

* Information listed above is at the time of submission. *

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