Award Data

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The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until June, 2020.

  1. Hyper-velocity Warhead with Advanced Load-out and Leathality (Hyper-WALL)

    SBC: Systima Technologies, Inc.            Topic: MDA18003

    Systima is proposing the development of a non-hit-to-kill warhead for hyper-velocity projectiles capable of deploying a volumetrically efficient tungsten payload using advanced manufacturing techniques. Using Wire Electrical Discharge Machining (Wire EDM), the payload packaging efficiency is dramatically increased while also reducing cost due to greater design simplicity and ease of assembly of th ...

    SBIR Phase I 2018 Department of DefenseMissile Defense Agency
  2. Memory Instrumentation and Performance Simulation (MIPS)

    SBC: ATC-NY, Inc.            Topic: DTRA172003

    Next-generation high-performance computing (HPC) hardware, such as the Intel Xeon Phi Knights Landing Many-Integrated-Core processor, provide new deep memory architectures that offer the promise of increased performance. The challenge in taking full advantage of this architecture is selecting which data structures will be placed in the high-bandwidth memory. Optimizing data structure placement in ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  3. Low-Cost Sensing Array for Infrasound

    SBC: CREARE LLC            Topic: DTRA172001

    Infrasound and seismic measurements are used by DTRA and the DoD for nuclear test monitoring, terrorist blast forensics, battle damage assessment, and environmental monitoring. However, these long wavelength physical signals are typically recorded through single-point sensors or sparse low density arrays. As a result, the critical signals of interest are often corrupted or masked by noise or inter ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  4. A Robust, Machine Independent, Software Toolkit for Topology Aware Process Mapping on Distributed Memory HPC Architectures

    SBC: Continuum Dynamics Inc            Topic: DTRA172002

    A significant performance gap exists between the theoretical number of Floating Point Operations (FLOPS) that a HPC machine is capable of sustaining and the number of FLOPS realized by real-world HPC applications. One of the principle reasons for this gap is the parasitic work that computational processes must do to communicate with one another. It has been shown that this communication work can b ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  5. Radar Cross Section Testing for Modeling and Simulations

    SBC: Andro Computational Solutions LLC            Topic: MDA17009

    The objective of the proposal is to conduct theoretical research and development related to the expedited radar cross section (RCS) testing to determine the merit and technical feasibility of proposed concept. In Phase I ANDRO/Alion team proposes adapting techniques drawn from real-time electronic warfare counter-measure systems, multi-threat response and characterization where direct use of short ...

    SBIR Phase I 2018 Department of DefenseMissile Defense Agency
  6. Portable Time of Flight Mass Spectrometer for Nuclear Forensics

    SBC: CREARE LLC            Topic: DTRA08004

    Analysis of nuclear material samples in the field has many advantages over laboratory analysis. Laboratory analyses can be slow, involve increased expense, lead to additional waste generation and disposal problems, and may introduce errors due to sample degradation or mishandling. In situ analysis mitigates all of these problems. The specific aim of this project is the development of a truly por ...

    SBIR Phase I 2008 Department of DefenseDefense Threat Reduction Agency
  7. Agent Defeat using a DWA Accelerator

    SBC: Brookhaven Technology Group, Inc.            Topic: DTRA08008

    A new type of compact induction accelerator currently under development at the Lawrence Livermore National Laboratory (LLNL) promises to increase the average accelerating gradient by at least an order of magnitude over that of existing induction machines. The machine is based on the use of high gradient vacuum insulators and advanced dielectric materials and switches. The system, called the Diel ...

    SBIR Phase I 2008 Department of DefenseDefense Threat Reduction Agency
  8. Engineering Models for Damage to Structural Components Subjected to Internal Blast Loading

    SBC: Thornton Tomasetti, Inc.            Topic: DTRA08006

    Predicting the response of building components to internal detonations is more complex than the corresponding task for external loads because of the more complex loading waveforms which include multiple reflections in the shock phase followed by a long duration pseudostatic loading that depends upon room venting. Add the possibility of additional impulsive loading from primary debris. We propose t ...

    SBIR Phase I 2008 Department of DefenseDefense Threat Reduction Agency
  9. Slow Cook-Off Insensitive Munitions Solutions for Solid Rocket Motors

    SBC: Systima Technologies, Inc.            Topic: MDA07047

    The objective of this proposal is to develop highly reliable technologies for initiating and venting large diameter SRMs subjected to slow cook-off. Systima with support from Alliant Techsystems Inc. (ATK), Tactical Propulsion and Controls Division, proposes to integrate auto-ignition propellant, safe and arm mechanisms, and novel techniques to sever large diameter rocket motor casing. In slow c ...

    SBIR Phase I 2008 Department of DefenseMissile Defense Agency
  10. High Performance Rad Hard Analog to Digital Converter Architectures

    SBC: Orora Design Technologies, Inc.            Topic: MDA07003

    Orora Design Technologies proposes to develop and demonstrate the feasibility of a template-based solution to the design of high-performance radiation-hardened analog-to-digital converters (ADCs). Research will be focused on innovatice architectures for a Delta-Sigma ADC of 2.5 MSPS data rate at 16-bit or greater resolution with 250mW or less power consumption, and a pipelined ADC of 180MSPS data ...

    SBIR Phase I 2008 Department of DefenseMissile Defense Agency
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