You are here

Award Data

For best search results, use the search terms first and then apply the filters
Reset

The Award database is continually updated throughout the year. As a result, data for FY24 is not expected to be complete until March, 2025.

Download all SBIR.gov award data either with award abstracts (290MB) or without award abstracts (65MB). A data dictionary and additional information is located on the Data Resource Page. Files are refreshed monthly.

The SBIR.gov award data files now contain the required fields to calculate award timeliness for individual awards or for an agency or branch. Additional information on calculating award timeliness is available on the Data Resource Page.

  1. Real-Time Frequency-Selective Fading Channel Realization Generator

    SBC: WELKIN SCIENCES, LLC            Topic: DTRA122020

    During Phase I and a first Phase II, Welkin Sciences developed the Channel Realization Generator (CReG) algorithm, an enhanced functional replacement for the ACIRF code intended to be embedded into software link simulations and HWIL fading channel simulators. The proposed second Phase II effort will refine the CReG documentation and its software and firmware implementations. Many in the strategic ...

    SBIR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  2. Lithography Cost Reduction for Rad Hard Integrated Circuits

    SBC: SILICON TECHNOLOGIES, INC.            Topic: DTRA143008

    The DoD faces mounting costs for integrated circuits built with advanced technology. Our proposal addresses mixed-signal ASIC design costs and fabrication costs, notably photomask costs and photolithography costs. The ADONIS 1D design methodology has been demonstrated at technologies ranging from 130nm to 16nm. In Phase I of the program, we used ADONIS to design a reference circuit a high-speed c ...

    SBIR Phase II 2017 Department of DefenseDefense Threat Reduction Agency
  3. Novel Methods to Measure Penetrator Dynamics in Multi-Layer Geometries

    SBC: Thornton Tomasetti, Inc.            Topic: DTRA07011

    In Phase I of this effort we analyzed the structural response of a BLU 109 during typical penetration events. Based on these finite element results, we proposed and demsonstrated a simple robust concept for a passive penetrator sensor that identifies the material being penetrated and also correlates strongly with its underground trajectory. Such a sensor would obviously provide valuable informatio ...

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  4. The Characterization and Mitigation of Single Event Effects in Ultra-Deep Submicron (< 90nm) Microelectronics

    SBC: Orora Design Technologies, Inc.            Topic: DTRA07005

    Orora Design Technologies proposes to develop electronic design automation (EDA) tools employing minimally invasive circuit design-based methods to mitigate single event effects (SEEs) for next generation Ultra-DSM CMOS (

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  5. SEE Modeling and Mitigation in Ultra-Deep Submicron Microelectronics

    SBC: MICROELECTRONICS RESEARCH DEVELOPMENT CORPORATION            Topic: DTRA07005

    As technology feature sizes decrease, single event upset (SEU), digital single event transient (DSET), and multiple bit upset (MBU) effects dominate the radiation response of microcircuits. Recent test circuits and test methods have quantified the pulse widths of DSETs generated from heavy-ion strikes on critical microcircuit nodes. These pulse widths have proven to be much larger than previousl ...

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  6. Ballistic Missile System Innovative Radiation Hardened/Tolerant Electronics Products

    SBC: Orora Design Technologies, Inc.            Topic: MDA03056

    Orora Design Technologies, teaming up ATK Mission Research and Boeing Solid-State Electronics, with the support from Oregon State University and Vanderbilt University, proposes to develop innovative mixed-mode and mixed-level simulation capacities for combined simulation of radiation and electrical performance to speed up simulation in radiation hard designs of VLSI circuits. The ultimate goal is ...

    SBIR Phase II 2006 Department of DefenseDefense Threat Reduction Agency
US Flag An Official Website of the United States Government