Award Data

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The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until September, 2020.

  1. Memory Instrumentation and Performance Simulation (MIPS)

    SBC: ATC-NY, Inc.            Topic: DTRA172003

    Next-generation high-performance computing (HPC) hardware, such as the Intel Xeon Phi Knights Landing Many-Integrated-Core processor, provide new deep memory architectures that offer the promise of increased performance. The challenge in taking full advantage of this architecture is selecting which data structures will be placed in the high-bandwidth memory. Optimizing data structure placement in ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  2. Low-Cost Sensing Array for Infrasound

    SBC: CREARE LLC            Topic: DTRA172001

    Infrasound and seismic measurements are used by DTRA and the DoD for nuclear test monitoring, terrorist blast forensics, battle damage assessment, and environmental monitoring. However, these long wavelength physical signals are typically recorded through single-point sensors or sparse low density arrays. As a result, the critical signals of interest are often corrupted or masked by noise or inter ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  3. Additive Manufacturing of All Solid-State Batteries with Novel Electrode Architectures

    SBC: Storagenergy Technologies, Inc.            Topic: DTRA172005

    Supercapacitors have attracted considerable recent attentions due to their high-power density, and long cycle life. Unfortunately, the energy density of supercapacitors is too low to meet these applications requiring an energy supply for longer periods (hours or days). Storagenergy Technologies Inc. proposes to develop a superior all solid-state battery (ASSB) fabricated by additive manufacturing ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  4. A Robust, Machine Independent, Software Toolkit for Topology Aware Process Mapping on Distributed Memory HPC Architectures

    SBC: Continuum Dynamics Inc            Topic: DTRA172002

    A significant performance gap exists between the theoretical number of Floating Point Operations (FLOPS) that a HPC machine is capable of sustaining and the number of FLOPS realized by real-world HPC applications. One of the principle reasons for this gap is the parasitic work that computational processes must do to communicate with one another. It has been shown that this communication work can b ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  5. Novel Methods to Measure Penetrator Dynamics in Multi-Layer Geometries

    SBC: Thornton Tomasetti, Inc.            Topic: DTRA07011

    In Phase I of this effort we analyzed the structural response of a BLU 109 during typical penetration events. Based on these finite element results, we proposed and demsonstrated a simple robust concept for a passive penetrator sensor that identifies the material being penetrated and also correlates strongly with its underground trajectory. Such a sensor would obviously provide valuable informatio ...

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  6. Real-Time Portable Neutron Spectroscopy

    SBC: Michigan Aerospace Corporation            Topic: DTRA07002

    A critical gap in homeland security is the inability to efficiently detect and identify kilogram-size samples of Special Nuclear Materials (SNM, uranium and transuranic elements). Penetrating neutron emission is unique to fissionable material and difficult to obscure with passive shielding. The current state of the art in neutron imaging is not suitable for field applications. Michigan Aerospace ...

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  7. The Characterization and Mitigation of Single Event Effects in Ultra-Deep Submicron (< 90nm) Microelectronics

    SBC: Orora Design Technologies, Inc.            Topic: DTRA07005

    Orora Design Technologies proposes to develop electronic design automation (EDA) tools employing minimally invasive circuit design-based methods to mitigate single event effects (SEEs) for next generation Ultra-DSM CMOS (

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  8. Portable Time of Flight Mass Spectrometer for Nuclear Forensics

    SBC: CREARE LLC            Topic: DTRA08004

    Analysis of nuclear material samples in the field has many advantages over laboratory analysis. Laboratory analyses can be slow, involve increased expense, lead to additional waste generation and disposal problems, and may introduce errors due to sample degradation or mishandling. In situ analysis mitigates all of these problems. The specific aim of this project is the development of a truly por ...

    SBIR Phase I 2008 Department of DefenseDefense Threat Reduction Agency
  9. Agent Defeat using a DWA Accelerator

    SBC: Brookhaven Technology Group, Inc.            Topic: DTRA08008

    A new type of compact induction accelerator currently under development at the Lawrence Livermore National Laboratory (LLNL) promises to increase the average accelerating gradient by at least an order of magnitude over that of existing induction machines. The machine is based on the use of high gradient vacuum insulators and advanced dielectric materials and switches. The system, called the Diel ...

    SBIR Phase I 2008 Department of DefenseDefense Threat Reduction Agency
  10. Engineering Models for Damage to Structural Components Subjected to Internal Blast Loading

    SBC: Thornton Tomasetti, Inc.            Topic: DTRA08006

    Predicting the response of building components to internal detonations is more complex than the corresponding task for external loads because of the more complex loading waveforms which include multiple reflections in the shock phase followed by a long duration pseudostatic loading that depends upon room venting. Add the possibility of additional impulsive loading from primary debris. We propose t ...

    SBIR Phase I 2008 Department of DefenseDefense Threat Reduction Agency
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