Award Data

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The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until September, 2020.

  1. Plan Learning Across Textual Observations (PLATO) Phase II

    SBC: LANGUAGE COMPUTER CORPORATION            Topic: DTRA162004

    In Phase II of PLATO, we will develop a prototype plan and goal identification system that employs a rich model of domain actions and events, extracted automatically from a massive amount of real-world domain-relevant information, to model agent-specific action costs and to process sequences of agent actions and events, extracted from text, as an agent plan in progress. The system will be able to ...

    SBIR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  2. Portable, Fieldable, Non- Helium-3 Based Neutron Multiplicity Counter

    SBC: PROPORTIONAL TECHNOLOGIES, INC.            Topic: DTRA162007

    Neutron coincidence counters are currently based on 3H technology. A worldwide 3He shortage plus the need for significant improvements in performance necessitate the development of a new class of neutron detectors. We propose the use of boron-coated straw

    SBIR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  3. JOLTER: Joint Learning of Topics, Entities, Events and Relations

    SBC: LANGUAGE COMPUTER CORPORATION            Topic: DTRA152005

    In Phase II of JOLTER, we will develop several extensions and improvements upon the probabilistic graphical models developed in Phase I for discovering topics, entities, and relations jointly. The system will be able to (1) Discover and extend hierarchies of topics, entities, and relations; (2) Discover categories for events, multiway relations, and their roles; (3) Conditionalize the topics, ent ...

    SBIR Phase II 2017 Department of DefenseDefense Threat Reduction Agency
  4. Knowledge Exploitation and Population for Event Reasoning (KEPLER) Phase II

    SBC: LANGUAGE COMPUTER CORPORATION            Topic: DTRA143005

    In Phase II of KEPLER, we will develop a prototype Knowledge Base (KB) expansion system that employs rich common-sense knowledge resources to perform high-quality scalable inference over a KB. The system will be able to (1) extract event parameters, event constructs, ontological relationships, definitional effects and inferences, and quantitative expectations from open text and structured resource ...

    SBIR Phase II 2017 Department of DefenseDefense Threat Reduction Agency
  5. Lithography Cost Reduction for Rad Hard Integrated Circuits

    SBC: SILICON TECHNOLOGIES, INC.            Topic: DTRA143008

    The DoD faces mounting costs for integrated circuits built with advanced technology. Our proposal addresses mixed-signal ASIC design costs and fabrication costs, notably photomask costs and photolithography costs. The ADONIS 1D design methodology has been demonstrated at technologies ranging from 130nm to 16nm. In Phase I of the program, we used ADONIS to design a reference circuit a high-speed c ...

    SBIR Phase II 2017 Department of DefenseDefense Threat Reduction Agency
  6. Novel Methods to Measure Penetrator Dynamics in Multi-Layer Geometries

    SBC: Thornton Tomasetti, Inc.            Topic: DTRA07011

    In Phase I of this effort we analyzed the structural response of a BLU 109 during typical penetration events. Based on these finite element results, we proposed and demsonstrated a simple robust concept for a passive penetrator sensor that identifies the material being penetrated and also correlates strongly with its underground trajectory. Such a sensor would obviously provide valuable informatio ...

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  7. The Characterization and Mitigation of Single Event Effects in Ultra-Deep Submicron (< 90nm) Microelectronics

    SBC: Orora Design Technologies, Inc.            Topic: DTRA07005

    Orora Design Technologies proposes to develop electronic design automation (EDA) tools employing minimally invasive circuit design-based methods to mitigate single event effects (SEEs) for next generation Ultra-DSM CMOS (

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
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