Award Data

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The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until June, 2020.

  1. Real-Time Frequency-Selective Fading Channel Realization Generator

    SBC: Welkin Sciences, LLC            Topic: DTRA122020

    During Phase I and a first Phase II, Welkin Sciences developed the Channel Realization Generator (CReG) algorithm, an enhanced functional replacement for the ACIRF code intended to be embedded into software link simulations and HWIL fading channel simulators. The proposed second Phase II effort will refine the CReG documentation and its software and firmware implementations. Many in the strategic ...

    SBIR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  2. Innovative Mitigation of Radiation Effects in Advanced Technology Nodes

    SBC: Microelectronics Research Development Corporation            Topic: DTRA16A003

    Micro-RDC has developed portable radiation effects test structures that scale to new process nodes.These structures will enable the investigation of the effects of radiation on the new technology from the material processing level as well as the circuit level.Fabricating the chosen structures and the refinement of software to extract the model parameters will be completed in this effort.A suite of ...

    STTR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  3. Low Voltage Radiation Hardened Optoelectronics for Optical Interconnects

    SBC: QUANTTERA LLC            Topic: DTRA152001

    The Defense Threat Reduction Agency (DTRA) recognizes the need for low-power high-bandwidth radiation-hard optical interconnects to process more data more quickly and to replace electronic data.Our companys core development in optical communications with semiconductor materials is a unique fit for DTRAs low-power consumption high-bandwidth radiation-hard intra-chip communication components for sat ...

    SBIR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  4. The Characterization and Mitigation of Single Event Effects in Ultra-Deep Submicron (< 90nm) Microelectronics

    SBC: Orora Design Technologies, Inc.            Topic: DTRA07005

    Orora Design Technologies proposes to develop electronic design automation (EDA) tools employing minimally invasive circuit design-based methods to mitigate single event effects (SEEs) for next generation Ultra-DSM CMOS (

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  5. SEE Modeling and Mitigation in Ultra-Deep Submicron Microelectronics

    SBC: Microelectronics Research Development Corporation            Topic: DTRA07005

    As technology feature sizes decrease, single event upset (SEU), digital single event transient (DSET), and multiple bit upset (MBU) effects dominate the radiation response of microcircuits. Recent test circuits and test methods have quantified the pulse widths of DSETs generated from heavy-ion strikes on critical microcircuit nodes. These pulse widths have proven to be much larger than previousl ...

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
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